Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | SBDIP |
| Pkg. Code: | DAV |
| Lead Count (#): | 16 |
| Pkg. Dimensions (mm): | 20.32 x 7.49 x 2.41 |
| Pitch (mm): | 2.54 |
Environmental & Export Classifications
| Pb (Lead) Free | Yes |
| ECCN (US) | 9A515.e.1 |
| HTS (US) | 8542.39.0090 |
| RoHS (HS1-26C31RH-T) | EnglishJapanese |
| Moisture Sensitivity Level (MSL) |
Product Attributes
| Pkg. Type | SBDIP |
| Lead Count (#) | 16 |
| Pkg. Dimensions (mm) | 7 x 20 x 5.08 |
| DLA SMD | 5962R9666301TEC |
| Pb (Lead) Free | Yes |
| MOQ | 450 |
| Temp. Range (°C) | -55 to +125°C |
| CAGE code | 34371 |
| DSEE (MeV·cm2/mg) | 100 |
| Die Sale Availability? | No |
| Flow | RH Hermetic |
| Input High Voltage Range | 0.7 VDD |
| Input Low Voltage Range | 0.3 VDD |
| Input Rise and Fall Time (ns) | 500 |
| Lead Compliant | No |
| Length (mm) | 7 |
| Max Power Dissipation (mW) | 2.75 |
| Models Available | IBIS |
| PROTO Availability? | No |
| Qualification Level | Class T |
| Rating | Space |
| SMD URL | 5962-96663 |
| Supply Voltage (V) | 5 - 5 |
| Supply Voltage (max) (V) | 5.5 - 5.5 |
| Supply Voltage (min) (V) | 4.5 - 4.5 |
| TID HDR (krad(Si)) | 100 |
| Tape & Reel | No |
| Thickness (mm) | 5.08 |
| Width (mm) | 20 |
Resources for HS-26C31RH-T
Description
Intersil's Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability. The Intersil HS-26C31RH-T is a Quad Differential Line Driver designed for digital data transmission over balanced lines and meets the requirements of EIA Standard RS-422. Radiation Hardened CMOS processing assures low power consumption, High-Speed, and reliable operation in the most severe radiation environments. The HS-26C31RH-T accepts CMOS inputs and converts them to RS-422 compatible outputs. This circuit uses special outputs that enable the drivers to power down without loading down the bus. Enable and disable pins allow several devices to be connected to the same data source and addressed independently.