Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG72 |
| Lead Count (#): | 72 |
| Pkg. Dimensions (mm): | 10.0 x 10.0 x 1.0 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 72 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 168 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| Assembly Location | TAIWAN |
| Wafer Fab Location | TAIWAN |
| Accepts Spread Spec Input | Yes |
| Advanced Features | Multiple SMBus addresses, SW PLL mode control |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, QPI, UPI, IF-UPI, 25G EDR |
| Architecture | Common, SRIS, SRNS |
| C-C Jitter Max P-P (ps) | 50 |
| Chipset Manufacturer | Intel |
| Chipset Name | C600, Patsburg, Wellsburg, Lewisburg |
| Clock Spec. | DB1900Z v1.7 |
| Core Voltage (V) | 3.3V |
| Diff. Input Signaling | HCSL |
| Diff. Inputs | 1 |
| Diff. Output Signaling | HCSL |
| Diff. Outputs | 19 |
| Diff. Termination Resistors | 0 |
| Feedback Input | No |
| Function | Zero Delay Buffer |
| Input Freq (MHz) | 33 - 150 |
| Input Type | HCSL |
| Inputs (#) | 1 |
| Length (mm) | 10 |
| MOQ | 168 |
| Output Banks (#) | 1 |
| Output Enable (OE) Pins | 8 |
| Output Freq Range (MHz) | 33 - 400 |
| Output Impedance | 33 |
| Output Skew (ps) | 85 |
| Output Type | LP-HCSL |
| Output Voltage (V) | 0.7V |
| Outputs (#) | 19 |
| PLL | Yes |
| Package Area (mm²) | 100 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 10.0 x 10.0 x 1.0 |
| Pkg. Type | VFQFPN |
| Power Consumption Typ (mW) | 1676 |
| Product Category | PCI Express Clocks, Processor Clock Buffers, Zero Delay Buffers |
| Prog. Clock | Yes |
| Prog. Interface | SMBUS |
| Reference Output | No |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 10 |
The 9ZX21901D is a second-generation DB1900Z differential buffer for Intel Purley and newer platforms. The part is backward compatible with the 9ZX21901C while offering much-improved phase jitter performance. Fixed external feedback maintains low drift for critical QPI/UPI applications. In bypass mode, the 9ZX21901D can provide outputs up to 400MHz.