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Renesas Electronics Corporation

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20-Output Enhanced DB2000QL PCIe Clock Buffer

Package Information

CAD Model:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NHG80
Lead Count (#):80
Pkg. Dimensions (mm):6.0 x 6.0 x 0.85
Pitch (mm):0.5

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)80
Carrier TypeReel
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)4000
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye4 NiPdAu
Temp. Range (°C)-40 to 105°C
Assembly LocationTAIWAN
Wafer Fab LocationCHINA, TAIWAN
Accepts Spread Spec InputYes
Additive Jitter4fs
Advanced FeaturesMultiple SMBus addresses, Side Band interface
App Jitter Compliance25G EDR, IF-UPI, PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, DB2000Q, QPI, UPI, PCIe Gen6
ArchitectureCommon, SRIS, SRNS
C-C Jitter Max P-P (ps)50
Chipset ManufacturerIntel
Clock Spec.Enhanced DB2000QL
Core Voltage (V)3.3V
Diff. Input SignalingHCSL
Diff. Inputs1
Diff. Output SignalingLP-HCSL
Diff. Outputs20
Diff. Termination Resistors24
Feedback InputNo
FunctionFanout Buffer
Input Freq (MHz)1 - 400
Input TypeHCSL
Inputs (#)1
Length (mm)6
Longevity2040 Apr
MOQ4000
Output Banks (#)1
Output Enable (OE) Pins8
Output Freq Range (MHz)1 - 400
Output Impedance85
Output Skew (ps)50
Output TypeLP-HCSL
Output Voltage (V)0.7V
Outputs (#)20
PLLNo
Package Area (mm²)81
Pitch (mm)0.5
Pkg. Dimensions (mm)6.0 x 6.0 x 0.85
Pkg. TypeVFQFPN
Power Consumption Typ (mW)720
Product CategoryPCI Express Clocks, Processor Clock Buffers, Zero Delay Buffers
Reel Size (in)13
Reference OutputNo
Spread SpectrumYes
Supply Voltage (V)3.3 - 3.3
Tape & ReelYes
Thickness (mm)0.85
VOUT Slew-rate ControlNo
Width (mm)6

Description

The 9QXL2001C is a 20-output very-low additive phase jitter fanout buffer for PCIe Gen1 to Gen6 applications. The 9QXL2001C provides two methods to control output enables; standard OE# pins and SMBus enable bits, and a simple 3-wire serial interface (side-band interface) that is independent of the SMBus. The side-band interface is enabled via a hardware strap and operates simultaneously with the OE# pins and SMBus enable bits. It offers integrated terminations for 85Ω transmission lines.