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9DB833 - Block Diagram
9DB833 - Pinout
3D illustration featuring top and bottom views of TSSOP IC chip package with 48 lead count.
9DB833 - Block Diagram
9DB833 - Pinout
3D illustration featuring top and bottom views of TSSOP IC chip package with 48 lead count.

9DB833AGILF

Active
8-Output 3.3V PCIe Gen1-2-3 Zero Delay/Fanout Buffer
9DB833 DatasheetLearn more about 9DB833

Package Information

CAD Model:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PAG48
Lead Count (#):48
Pkg. Dimensions (mm):12.5 x 6.1 x 1.0
Pitch (mm):0.5

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)48
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)39
Package Area (mm²)76.3
Pitch (mm)0.5
Pkg. Dimensions (mm)12.5 x 6.1 x 1.0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Country of AssemblyTAIWAN
Country of Wafer FabricationSINGAPORE
Accepts Spread Spec InputYes
Advanced FeaturesHW PLL mode control
App Jitter CompliancePCIe Gen1, PCIe Gen2, PCIe Gen3
ArchitectureCommon
C-C Jitter Max P-P (ps)50
C-C Jitter Typ P-P (ps)25
Chipset NameBlackford, Clarksboro, Greencreek, Lindenhurst, Twincastle, San Clemente, Seaburg, Tylersburg
Clock Spec.DB800 Gen3
Core Voltage (V)3.3
Diff. Input SignalingHCSL
Diff. Inputs1
Diff. Output SignalingHCSL
Diff. Outputs8
Diff. Termination Resistors32
Feedback InputNo
FunctionZero Delay Buffer
Input Freq (MHz)50 - 100
Input TypeHCSL
Inputs (#)1
Length (mm)12.5
MOQ156
Multiplication Value1
Output Banks (#)1
Output Freq Range (MHz)5 - 166.66
Output Skew (ps)50
Output TypeHCSL
Output Voltage (V)0.8
Outputs (#)8
PLLYes
Pkg. TypeTSSOP
Platform NameBensley, Caneland, Glidewell, Lindenhurst, Truland, Stoakley, Thurley, Cranberry Lake
Power Consumption Typ (mW)528
Product CategoryPCI Express Clocks
Prog. ClockNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Supply Voltage (V)3.3 - 3.3
Tape & ReelNo
Thickness (mm)1
Width (mm)6.1

Description

The 9DB833 zero delay buffer (ZDB) supports PCIe Gen3 requirements while being backward compatible with PCIe Gen2 and Gen1. The 9DB833 is driven by a differential SRC output pair from a 932S421 or 932SQ420 or equivalent main clock generator.

Learn more about 9DB833