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2 to 4 Differential PCIe GEN1 Clock MUX

Package Information

CAD Model:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG20
Lead Count (#):20
Pkg. Dimensions (mm):6.5 x 4.4 x 1.0
Pitch (mm):0.65

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)20
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)74
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)0 to 70°C
Country of AssemblyTAIWAN
Country of Wafer FabricationSINGAPORE
Accepts Spread Spec InputYes
App Jitter CompliancePCIe Gen1
ArchitectureCommon
C-C Jitter Typ P-P (ps)65
Core Voltage (V)3.3
Diff. Input SignalingHCSL
Diff. Inputs2
Diff. Output SignalingHCSL
Diff. Outputs4
Diff. Termination Resistors16
FunctionMultiplexer
Input Freq (MHz)200
Input TypeHCSL
Inputs (#)2
Length (mm)6.5
MOQ148
Output Banks (#)1
Output Freq Range (MHz)200
Output Skew (ps)50
Output TypeHCSL, LVDS
Output Voltage (V)3.3
Outputs (#)4
PLLNo
Package Area (mm²)28.6
Pitch (mm)0.65
Pkg. Dimensions (mm)6.5 x 4.4 x 1.0
Pkg. TypeTSSOP
Power Consumption Typ (mW)264
Price (USD)$3.23927
Prog. ClockNo
PublishedNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Supply Voltage (V)3.3 - 3.3
Tape & ReelNo
Thickness (mm)1
Width (mm)4.4

Description

The 557-06 is a two to four differential clock mux designed for use in PCI-Express applications. The device selects one of the two differential HCSL input pairs and fans out to four pairs of differential HCSL or LVDS outputs.