The 32186 Group is supported only for the customers who have already adopted any of the products. For new adoption, please consider other products such as RX651, RX63T Group.

Main Solutions

Key Features:

  • CPU: M32R-FPU core
    (M32R Family common instruction set + single-precision FPU / bit manipulation instructions)
  • Pipeline structure: 6-stage structure
  • Instruction set: 100 discrete instructions / 6 addressing modes
  • Instruction format: 16 bit/32-bit length
  • Built-in multiplier-accumulator (DSP function instructions)
  • Minimum instruction execution time: 12.5ns (at f(CPUCLK) = 80 MHz operation)
  • Built-in flash memory
  • Built-in RAM
  • Virtual-flash emulation function : 8 Kbytes x 8 blocks
  • Interrupt controller: 41 interrupt sources, 8 priority levels
  • Wait controller: can be extended 0-15 wait cycles and external signal for each of 4 areas
  • I/O port: 97 ports (selectable from 3 input levels)
  • External interrupt input pin : 27 pins
  • DMAC: 10 channels
  • Multijunction timers (MJT) : 55 channels
  • A/D converter : 16 channels 10-bit converter (sample & hold x 2)
  • Serial interface: 4 channels (clock synchronized/UART), 2 channels (UART)
  • CAN (CAN Specification 2.0B active): 2 channels, each having 32 message slots
  • Direct RAM Interface (DRI)
  • Real-time debugger (RTD)
  • Non-Break Debug (NBD)
  • JTAG (boundary scan function)
  • Debug interface common to the M32R Family (SDI: Scalable Debug Interface)
  • Package: 144 pin LQFP (0.5mm pitch)


Below you will find information to support the development of your application.


Resources for Software and Hardware

Title Description
My Renesas Create a My Renesas account to use our tool download services, receive e-newsletter/update notifications, and take advantage of our other services.
e-learning Information for studying and learning about microcontrollers and microprocessors.
FAQ Frequently asked questions and useful hints for development.
Forum A forum and community site to share technical information, questions and opinions with others who use Renesas products.
Video Watch videos related to this product.


Hardware Design Support

Title Description
IBIS/BSDL IBIS standard simulation data is required for high-speed board design and can be used to run simulations to examine and troubleshoot issues such as waveform reflection, ringing, and so on, before producing the actual board. BSDL is a data input format supported by most IEEE 1149.1 (JTAG)-compliant tools. The automatic test pattern generation (ATPG) and automatic test equipment functions of these tools facilitate testing.

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