The 8T49N242 has one fractional-feedback PLL that can be used as a frequency translator with jitter attenuation or a frequency synthesizer. It is equipped with four integer output dividers, allowing the generation of up to four different output frequencies, ranging from 8 kHz to 1 GHz. Output frequencies can be completely independent of the input frequencies. The four outputs may select among LVPECL, LVDS, HCSL or LVCMOS output levels.

The 8T49N242 is ideal for use in a wide range of equipment, including 10G/40G/100G SONET/SDH and Ethernet network line cards, wireless base station baseband units, broadcast video. carrier Ethernet switches, OTN, or in test and measurement applications. For example, the 8T49N242 can be used in GbE/10GbE/100GbE Synchronous Ethernet line card applications in order to preserve the G.8262 compliance from the Synchronous Equipment Timing Source (SETS) on the timing card.

IDT’s third generation Universal Frequency Translator family also includes the 8T49N241 (2-in / 1-PLL / 4-out), the 8T49N285 (2-in / 1-PLL / 8-out), the 8T49N286 (4-in / 2-PLL / 8-out) and the 8T49N287 (2-in / 2-PLL / 8-out). These devices are complemented by the 82P33714 and 82P33731 synchronous equipment timing source (SETS) for Synchronous Ethernet (SyncE) and 10G-40G SyncE, respectively.

To see other devices in this product family, visit the Universal Frequency Translators page.


• Compliant with the requirements outlined in Telcordia GR-253-CORE (SONET) & ITU-T G.813/G.8262 (SDH/SONET & SyncE) when paired with a Synchronous Equipment Timing Source (SETS ) device
• Generates up to 4 LVPECL / LVDS/HCSL or 16 LVCMOS output clocks ranging from 8 kHz up to 1.0 GHz (diff), 8 kHz to 250 MHz (LVCMOS), that meet jitter limits for 10G up to 25G Ethernet applications
• 0.276ps RMS (including spurs), 12 kHz to 20 MHz
• Accepts up to two LVPECL, LVDS, LVHSTL, HCSL or LVCMOS input clocks ranging from 8 kHz up to 875 MHz
• Auto and manual input clock selection with hitless switching
• Clock input monitoring, including support for gapped clocks
• Phase-Slope Limiting and Fully Hitless Switching options to control output phase transients
• Operates from a 10 MHz to 50 MHz
• Register programmable through I2C or via external I2C EEPROM
• 8T49N242-998 “Boot from EEPROM”
• 8T49N242-999 “powers up disabled”
• Supported by IDT Timing Commander Software


This device is factory-configurable. Try the Custom Part Configuration Utility.
下单器件型号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 40 I 是的 Tray
Active VFQFPN 40 I 是的 Reel
Active VFQFPN 40 I 是的 Tray
Active VFQFPN 40 I 是的 Reel
Active VFQFPN 40 I 是的 Tray
Active VFQFPN 40 I 是的 Reel


文档标题 其他语言 类型 文档格式 文件大小 日期
8T49N242 Datasheet 数据手册 PDF 1.49 MB
8T49N242-006 Datasheet Addendum 简易格式数据手册 PDF 129 KB
FemtoNG Universal Frequency Translator Ordering Product Information Guide 手册 - 用户参考 PDF 270 KB
8T49N24x Evaluation Board User Guide 手册 - 评估板 PDF 1.41 MB
Timing Commander Installation Guide 指南 PDF 497 KB
应用指南 &白皮书
App Note 932 - Description for Startup and Calibration for UFT3G Family 应用文档 PDF 604 KB
8T49N24x Power-Up Configuration Guide 应用文档 PDF 175 KB
8T49N24x EEPROM Programming Guide 应用文档 PDF 593 KB
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
8T49N24x Frequency Programming Guide 应用文档 PDF 198 KB
AN-893 8T49N241_2 Frequency Synchronization Compliance Report 应用文档 PDF 1.11 MB
AN-831 The Crystal Load curve 应用文档 PDF 395 KB
AN-846 Termination - LVDS 应用文档 PDF 133 KB
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products 应用文档 PDF 128 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations 应用文档 PDF 115 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-832 Timing Budget and Accuracy 应用文档 PDF 131 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-830 Quartz Crystal Drive Level 应用文档 PDF 143 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance 应用文档 PDF 136 KB
AN-801 Crystal-High Drive Level 应用文档 PDF 202 KB
AN-806 Power Supply Noise Rejection 应用文档 PDF 438 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN#: TP1901-01 Datasheet Correction for I2C Read Sequence Diagrams for the UFT Product Family 产品变更通告 PDF 454 KB
PCN# : N1807-01 Die revisionc change, 8T49N240, 8T49N242 产品变更通告 PDF 21 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location 产品变更通告 PDF 583 KB
PCN# : N1609-01 Minor Design Change on Select Devices 产品变更通告 PDF 227 KB
PCN# : W1512-01 Wafer Size change from 200mm to 300mm at Global Foundries 产品变更通告 PDF 188 KB
Timing Commander Installer (v1.16.4) 软件 ZIP 19.79 MB
8T49N24x Timing Commander Personality File (v1.7.2) 软件工具 ZIP 6.91 MB
8T49N242 IBIS Model 模型 - IBIS ZIP 331 KB
8T49N24x Schematics Review Checklist 原理图 XLSX 550 KB
IDT Products for Wired Broadband Applications Application Briefs PDF 686 KB
IDT Products for Radio Applications 日本語 产品简述 PDF 2.34 MB
Flexible Solutions for Fast Edge Rate and Low Phase Noise Requirements 概览 PDF 154 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Clocks for Xilinx Ultrascale FPGAs 技术摘要 PDF 256 KB
IDT Clocks for Altera's Stratix V and Arria V/X FPGAs 技术摘要 PDF 238 KB
IDT Clocks for SMPTE and Xilinx® 7 Series FPGAs 技术摘要 PDF 566 KB
8T49N241/8T49N242 Universal Frequency Translators Product Brief 日本語 产品简述 PDF 571 KB
82P33714/31 SETS and 8T49N24x Universal Frequency Translators Product Brief 产品简述 PDF 370 KB
8T49N24x EVB Schematic 原理图 PDF 74 KB
8T49N24x Example Timing Commander Configuration and Phase Noise Plots 其它参数 ZIP 1.04 MB
8T49N24x Design Files (Schematic Symbol and PCB Footprint) PCB设计文档 ZIP 12 KB
IDT Jitter Attenuator Product Overview (Chinese) English 概览 PDF 772 KB

Boards & Kits

器件号 文档标题 类型 公司
8T49N242-EVK Evaluation Kit for 8T49N242 Renesas