The 5P49V60 is a member of IDT's VersaClock® 6E programmable clock generator family. The 5P49V60 is intended for automotive applications such as infotainment, dashboard, video processing, in-vehicle networking, as well as applications based on PCI-Express or USB 3. The reference clock can come from one of the two redundant clock inputs. A glitchless manual switchover function allows one of the redundant clocks to be selected during normal operation.
 
Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I²C interface.
 

特性

  • < 100mW core power (at 3.3V)
  • < 0.5ps RMS phase jitter (typical)
  • Meets PCIe® Gen1–4, USB 3.0, 1/10 GbE clock requirements
  • Supports both crystal (8MHz–40MHz) and external clock input (1MHz–350MHz)
  • 4 universal outputs pairs: LVPECL, LVDS, HCSL, or 8 LVCMOS outputs
  • 4 independent frequencies with 0.001MHz–350MHz output range
  • Reference output
  • 1.8V / 2.5V / 3.3V core and output voltages
  • 2 programmable I²C addresses allowing multiple devices to be used in same system.
  • Up to 4 different configuration sets in OTP non-volatile memory
  • Supported by IDT Timing Commander™  software tool
  • Quick sampling and customization process supported by online-form submission
  • 4 x 4 mm 24-VFQFPN wettable flank package
  • AEC-Q100 qualified
  • -40°C to +105°C operating temperature range

产品选择

This device is factory-configurable. Try the Custom Part Configuration Utility.
器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 24 2 是的 Tray
Availability
Active VFQFPN 24 2 是的 Reel
Availability

文档和下载

文档标题 language 类型 文档格式 文件大小 日期
数据手册与勘误表
5P49V60 Datasheet 数据手册 PDF 757 KB
使用指南与说明
Automotive VersaClock® 6E Register Descriptions and Programming Guide 手册 - 用户参考 PDF 951 KB
Timing Commander Installation Guide 指南 PDF 497 KB
应用指南 &白皮书
AN-975 Cascading PLLs 应用文档 PDF 255 KB
AN-970 Glitchless Frequency Adjustment using Fractional Output Divider 应用文档 PDF 717 KB
AN-960 Layout and EMI Recommendations for Automotive Applications (short form) 应用文档 PDF 342 KB
AN-954 Layout and EMI Recommendations for Automotive Applications 应用文档 PDF 406 KB
AN-909 PCB Layout Considerations for Designing IDT VersaClock 3S, 5 and 6 Clock Products 应用文档 PDF 901 KB
AN-918 Programmable Clocks vs Crystal Oscillators 应用文档 PDF 307 KB
AN-905 Using VersaClock® 6 as Reference Clock for Xilinx® Series 7 FPGAs 应用文档 PDF 188 KB
AN-846 Termination - LVDS 应用文档 PDF 133 KB
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-808 PCI Express/HCSL Termination 应用文档 PDF 137 KB
AN-806 Power Supply Noise Rejection 应用文档 PDF 438 KB
PCN / PDN
PCN# : TB1912-02(R1) Convert Shipping Media
from Tube or Tray to Cut Reel
产品变更通告 PDF 5.71 MB
PCN# : TB1912-02 Convert Shipping Media
from Tube or Tray to Cut Reel
产品变更通告 PDF 5.61 MB
下载
Timing Commander Installer (v1.16.4) 软件 ZIP 19.79 MB
VersaClock 6E Timing Commander Personality File v1.3.0 软件 ZIP 13.95 MB
5P49V6965 IBIS Model 模型 - IBIS ZIP 397 KB
其他
VersaClock Family Overview 日本語 概览 PDF 376 KB
IDT Products for Wired Broadband Applications Application Briefs PDF 686 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Clocks for Xilinx Ultrascale FPGAs 技术摘要 PDF 256 KB
IDT Clocks for Altera's Stratix V and Arria V/X FPGAs 技术摘要 PDF 238 KB

开发板与套件

器件号 文档标题 类型 Company
5P49V60-EVK Evaluation Board for 5P49V60 Automotive VersaClock® 6E 评估 Renesas