The 83PN128I is a programmable LVPECL synthesizer that can be used for frequency conversions. The device uses IDT's fourth generation FemtoClock® NG technology for optimal high clock frequency and low phase noise performance, combined with a low power consumption and high power supply noise rejection. Oscillator-level performance is maintained with IDT's 4th Generation FemtoClock® NG PLL technology, which delivers low rms phase jitter. The 83PN128I defaults to 161.132813MHz output using a 156.25MHz input with 2 select pins floating (pulled up with internal pullup resistors) but can also be set to 4 different frequency multiplier settings to support a wide variety of applications. The below table shows some of the more common application settings.

特性

  • Fourth Generation FemtoClock® NG technology
  • Footprint compatible with 5mm x 7mm differential oscillators
  • One differential LVPECL output pair
  • CLK, nCLK input pair can accept the following levels: HCSL, LVDS, LVPECL, LVHSTL and SSTL
  • Output frequency: 128.90MHz or 161.132813MHz
  • VCO range: 2.5GHz – 2.7GHz
  • Cycle-to-cycle jitter: 18ps (typical)
  • RMS phase jitter @ 128.90MHz, 12kHz – 20MHz: 0.53ps (typical)
  • Full 3.3V or 2.5V operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

产品选择

下单器件 ID Part Status Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete 10 I 是的 Tray
Availability
Obsolete 10 I 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
ICS83PN128I Datasheet 数据手册 PDF 404 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-831 The Crystal Load curve 应用文档 PDF 395 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products 应用文档 PDF 128 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations 应用文档 PDF 115 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-832 Timing Budget and Accuracy 应用文档 PDF 131 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-830 Quartz Crystal Drive Level 应用文档 PDF 143 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance 应用文档 PDF 136 KB
AN-801 Crystal-High Drive Level 应用文档 PDF 202 KB
AN-806 Power Supply Noise Rejection 应用文档 PDF 438 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PDN# : CQ-16-04 QUARTER MARKET DECLINED PDN 产品停产通告 PDF 560 KB
PCN# : A1309-01 Changed of Traceability Mark Format 产品变更通告 PDF 439 KB
PCN# : W1308-01 Change of Passivation Thickness 产品变更通告 PDF 941 KB
其他
Clock Distribution Overview 日本語 概览 PDF 217 KB
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Products for Radio Applications 日本語 产品简述 PDF 2.34 MB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB