The 74FCT38074S is a low skew, single input to four output, LVCMOS clock buffer. The 74FCT38074S has best in class additive phase Jitter of sub 50 fsec.

特性

  • Low additive phase jitter RMS: 50fs
  • Extremely low skew outputs (50ps)
  • Low cost clock buffer
  • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free
  • Input / Output clock frequency up to 200 MHz
  • Low power CMOS technology
  • Operating voltages of 1.8V to 3.3V
  • Extended temperature range (-40° to +105°C)

tune产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active COL 8 I 是的 Cut Tape
Availability
Active COL 8 I 是的 Reel
Availability
Active SOIC 8 I 是的 Tube
Availability
Active SOIC 8 I 是的 Reel
Availability

description文档

文档标题 language 类型 文档格式 文件大小 日期
数据手册与勘误表
star 74FCT38074S Datasheet 数据手册 PDF 207 KB
应用指南 & 白皮书
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
PCN / PDN
PCN# : A1905-02 Adding Carsem, Malaysia as Alternate Assembly Location & Change Material Sets 产品变更通告 PDF 268 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
其他
Clock Distribution Overview 日本語 概览 PDF 217 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB

file_download下载

文档标题 language 类型 文档格式 文件大小 日期
模型
74FCT38074S IBIS Model 模型 - IBIS ZIP 26 KB

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