The 9FGV0631 is a member of IDT's SOC-Friendly 1.8 V Very-Low-Power PCIe clock family. The device has 6 output enables for clock management, 2 different spread spectrum levels in addition to spread off and 2 selectable SMBus addresses.

特性

  • PCIe Gen1–4 compliant
  • LP-HCSL outputs; save 12 resistors compared to standard PCIe devices
  • 54 mW typical power consumption; reduced thermal concerns
  • Outputs can optionally be supplied from any voltage between 1.05 and 1.8 V; maximum power savings
  • OE# pins; support DIF power management
  • Programmable slew rate for each output; allows tuning for various line lengths
  • Programmable output amplitude; allows tuning for various application environments
  • DIF outputs blocked until PLL is locked; clean system start-up
  • Selectable 0%, -0.25% or -0.5% spread on DIF outputs; reduces EMI
  • External 25 MHz crystal; supports tight ppm with 0 ppm synthesis error
  • Configuration can be accomplished with strapping pins; SMBus interface not required for device control
  • 3.3 V tolerant SMBus interface works with legacy controllers
  • Space saving 5x5 mm 40-pin VFQFPN; minimal board space
  • Selectable SMBus addresses; multiple devices can easily share an SMBus segment
     

产品选择

下单器件 ID Part Status Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active 40 I 是的 Tray
Availability
Active 40 I 是的 Reel
Availability
Active 40 C 是的 Tray
Availability
Active 40 C 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
9FGV0631C Datasheet 数据手册 PDF 540 KB
应用指南 &白皮书
AN-975 Cascading PLLs 应用文档 PDF 255 KB
AN-918 Programmable Clocks vs Crystal Oscillators 应用文档 PDF 307 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs 应用文档 PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL 应用文档 PDF 235 KB
AN-843 PCI Express Reference Clock Requirements 应用文档 PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance 应用文档 PDF 136 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN# : A1403-03 Gold wire to Copper wire 产品变更通告 PDF 42 KB
PCN# : TB1311-01 New Carrier Tape on VFQFPN-28, VFQFPN-40, VFQFPN-48 产品变更通告 PDF 790 KB
Downloads
9FGV0631 IBIS Model 模型 - IBIS ZIP 92 KB
其他
Clock Distribution Overview 日本語 概览 PDF 217 KB
PCI Express Timing Solutions Overview 概览 PDF 275 KB
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB