The 9FGL0641/51 devices are 6-output 3.3V PCIe Gen1–5 clock generators. Each output has a dedicated OE# pin supporting PCIe CLKREQ# functionality. Two different spread spectrum levels, in addition to spread off, are supported. The 9FGL0641/51 supports PCIe Gen1–5 Common Clocked architectures (CC), PCIe Separate Reference no-Spread (SRNS) and Separate Reference Independent Spread (SRIS) clocking architectures.
 
For information regarding evaluation boards and material, please contact your local IDT sales representative.
 

特性

  • PCIe Gen1–5 CC-compliant
  • Supports PCIe SRIS and SRNS clocking
  • Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output
  • Pin-selectable SRnS 0%, CC 0% and CC/SRIS -0.5% spread
  • SMBus-selectable CC/SRIS -0.25% spread
  • One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support
  • Easy AC-coupling to other logic families, see IDT application note AN-891.
  • Space saving 5 × 5 mm 40-VFQFPN

产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Output Impedance Carrier Type Buy Sample
9FGL0641CKILF
Active VFQFPN 40 I 100 Tray
Availability
9FGL0641CKILFT
Active VFQFPN 40 I 100 Reel
Availability
9FGL0651CKILF
Active VFQFPN 40 I 85 Tray
Availability
9FGL0651CKILFT
Active VFQFPN 40 I 85 Reel
Availability

文档和下载

文档标题 language 类型 文档格式 文件大小 日期
数据手册与勘误表
9FGL02x1-04x1-06x1-08x1 Family Datasheet 数据手册 PDF 477 KB
使用指南与说明
Timing Products for NXP (Freescale) i.MX (Chinese) English 指南 PDF 512 KB
9FGx08 PCIe Clock Generator Evaluation Boards User Guide 手册 - 评估板 PDF 838 KB
应用指南 &白皮书
AN-975 Cascading PLLs 应用文档 PDF 255 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs 应用文档 PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL 应用文档 PDF 235 KB
AN-843 PCI Express Reference Clock Requirements 应用文档 PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance 应用文档 PDF 136 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A2005-01(R1) Add UTL, Thailand and JCET, China as Alternate Assembly Locations 产品变更通告 PDF 725 KB
PCN# : A2005-01 Add UTL, Thailand and JCET, China as Alternate Assembly Locations 产品变更通告 PDF 116 KB
PCN# : TP1910-02 Metal Change to Enhance Spread Performance 产品变更通告 PDF 127 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN# : MM1610-01 Improve performance to meet the new PCIe 产品变更通告 PDF 23 KB
下载
Software for PCIe Evaluation Kits 软件 ZIP 440 KB
9FGL0641 IBIS Model 模型 - IBIS ZIP 89 KB
9FGL06P1 IBIS Model 模型 - IBIS ZIP 203 KB
9FGL0651 IBIS Model 模型 - IBIS ZIP 89 KB
其他
PCI Express Timing Solutions Overview 概览 PDF 275 KB
9FGL06 Evaluation Board Schematic 原理图 PDF 33 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB