The IDT8V89316 is used to frequency synchronize equipment with an Ethernet connected reference; its integrated DCO (Digitally Controlled Oscillator) can be controlled by an external IEEE 1588 clock recovery servo to synthesize IEEE 1588-based clocks. The IDT8V89316 low jitter output clocks can be used to directly time Gigabit Ethernet PHYs and QSGMII devices.


  • Digital PLL synchronizes with Ethernet connected synchronization sources
  • DPLL bandwidth is 1.2 Hz; DPLL holdover accuracy is 1.1X10-5 ppm
  • Input references are monitored for frequency offset and activity
  • DPLL holdover, free run and hitless reference switching can be forced by the host processor or can be automatically controlled by an internal state machine
  • Internal DCO has resolution of 0.01105 ppb and can be controlled by an external processor via I2C interface for IEEE 1588 clock generation
  • One Analog PLL for jitter attenuation
  • Jitter generation <0.65ps RMS (10 kHz to 20 MHz), meets jitter requirements of 1 GbE PHYs and QSGMII
  • IN1, IN2 and IN3 accept single ended reference clocks whose frequencies can be 25 MHz, 125 MHz or 156.25 MHz
  • OUT1 outputs a differential clock with frequency of 125 MHz or 156.25 MHz
  • OUT2 to OUT6 output differential clocks all with the same frequency of 125 MHz or 156.25 MHz
  • OUT7 outputs a free-running LVCMOS clock with frequency of 25 MHz


下单器件型号 Part Status Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active C 是的 Tray
Active C 是的 Reel


文档标题 其他语言 类型 文档格式 文件大小 日期
8V89316 Datasheet 数据手册 PDF 631 KB
8V89316 Short Form Datasheet 简易格式数据手册 PDF 260 KB
8V89316 API Reference Manual 手册 - 软件 PDF 6.00 MB
82V391x / 8V893xx WAN PLL Device Families – Device Driver User's Guide 手册 - 用户参考 PDF 232 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations 应用文档 PDF 115 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-801 Crystal-High Drive Level 应用文档 PDF 202 KB
AN-806 Power Supply Noise Rejection 应用文档 PDF 438 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN# : A1702-01 Changed Mold Compound and Solder Paste on Select Packages 产品变更通告 PDF 93 KB
8V89316 IBIS File (zip) 模型 - IBIS ZIP 86 KB
8V89316 Device Driver Package Version 1.2 (source only, tarball) 软件 TGZ 160 KB
8V89316 Device Driver Package Version 1.2 (source only, zip) 软件 ZIP 275 KB
8V89316 BSDL File 模型 - BSDL BSD 15 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
Timing Fabric for Communications Equipment Overview 概览 PDF 263 KB

Boards & Kits

器件号 文档标题 类型 公司
8EBV89316 Evaluation Board 8EBV89316 for Industrial Automation and Power Systems - Ethernet PLL and IEEE 1588 Synthesizer Renesas