The 82EBP33814 Evaluation board for IEEE 1588 and Synchronous Ethernet allows the user to connect up to four differential ended and up to two single ended reference inputs via SMA connectors. The inputs can operate at any frequency from 1PPS to 650MHz. Synchronization functions are provided by the Renesas 82P33814 Digital PLL (DPLL) device which integrates two low jitter embedded clock synthesizers for Gigabit Ethernet and SONET/SDH PHYs.
 
As well as clock inputs and outputs the 82EBP33814 evaluation board supports control and monitoring of the Renesas 82P33814 device from a Windows computer using Timing CommanderTM over a USB interface. The board can also be connected via external ribbon cable to control the Renesas 82P33814 directly via I2C for 1588 applications, in which SW controls the DCO using frequency or phase offsets.
 
The Renesas 82EBP33814 low jitter output clocks can be used to directly synchronize 1G Ethernet and SONET/SDH devices by connecting the evaluation board’s SMA connectors to reference clock inputs on the system board.

特性

  • Suitable for evaluation of the 82P33814  SETS & SMU device for SyncE & IEEE 1588
  • Demonstrate the requirements of ITU-T G.8262 for EEC and ITU-T G.813 for SEC
  • Demonstrate the IEEE 1588 capability including DCO control, phase skewing & combo mode for meeting the requirements of ITU-T G.8263 for PEC-S-F and ITU-T G.8273.2 for T-BC
  • Timing Commander desktop configuration software
 

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star 82EBP33814 Evaluation Board User Guide 手册 - 硬件 PDF 3.57 MB

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