The ISLA110P50 is a low-power, high-performance, 500MSPS analog-to-digital converter designed with Intersil's proprietary FemtoCharge™ technology on a standard CMOS process. The ISLA110P50 is part of a pin-compatible portfolio of 8, 10 and 12-bit A/Ds. This device is an upgrade of the KAD551XP-50 product family and is pin similar. The device utilizes two time-interleaved 250MSPS unit A/Ds to achieve the ultimate sample rate of 500MSPS. A single 500MHz conversion clock is presented to the converter, and all interleave clocking is managed internally. The proprietary Intersil Interleave Engine (I2E) performs automatic fine correction of offset, gain, and sample time skew mismatches between the unit A/Ds to optimize performance. No external interleaving algorithm is required. A serial peripheral interface (SPI) port allows for extensive configurability of the A/D. The SPI also controls the interleave correction circuitry, allowing the system to issue continuous calibration commands as well as configure many dynamic parameters. Digital output data is presented in selectable LVDS or CMOS formats. The ISLA110P50 is available in a 72 Ld QFN package with an exposed paddle. Performance is specified over the full industrial temperature range (-40°C to +85°C).

特性

  • 1.15GHz Analog Input Bandwidth
  • 90fs Clock Jitter
  • Automatic Fine Interleave Correction Calibration
  • Multiple Chip Time Alignment Support via the Synchronous Clock Divider Reset
  • Programmable Gain, Offset and Skew Control
  • Over-Range Indicator
  • Clock Phase Selection
  • Nap and Sleep Modes
  • Two's Complement, Gray Code or Binary Data Format
  • DDR LVDS-Compatible or LVCMOS Outputs
  • Programmable Test Patterns and Internal Temperature Sensor

应用

  • Radar and Electronic/Signal Intelligence
  • Broadband Communications
  • High-Performance Data Acquisition

产品选择

器件号 Part Status Pkg. Type Carrier Type Buy Sample
Active QFN Tray
Availability

文档

文档标题 language 类型 文档格式 文件大小 日期
数据手册与勘误表
ISLA110P50 Datasheet 数据手册 PDF 1.79 MB
应用指南 & 白皮书
AN1604: ISLA11xP50 Output Data Timing and Synchronization 应用文档 PDF 342 KB
AN1609: Word Error Rate Measurement Methodology and Characterization Results 应用文档 PDF 296 KB
AN9675: A Tutorial in Coherent and Windowed Sampling with A/D Converters 应用文档 PDF 503 KB
AN002: Principles of Data Acquisition and Conversion 应用文档 PDF 1.08 MB
AN9705: A Theoretical View of Coherent Sampling 应用文档 PDF 287 KB
PCN / PDN
PA14042 - Minimum Line Quantity Change Product Advisory PDF 363 KB
其他
KDC5512EVAL, KDC5512HEVAL, KDC5512-50EVAL, KDC5514EVAL Schematics and Layers Design File PDF 483 KB
KMB001 Evaluation Board Schematics and Layers Design File PDF 959 KB
KMB001xEVALZ Design Files Design File ZIP 4.49 MB
MCR Installer v7.13 EXE 162.95 MB
Intersil Konverter Installer V1.22c EXE 1.00 MB
8-Bit to 16-Bit, 40MSPS to 500MSPS ADC Evaluation System User Guide 手册 PDF 1.02 MB
KAD-FMC-EVALZ User Guide 手册 PDF 509 KB

下载

文档标题 language 类型 文档格式 文件大小 日期
软件
MCR Installer v7.13 EXE 162.95 MB
Intersil Konverter Installer V1.22c EXE 1.00 MB

开发板与套件

器件号 文档标题 类型 Company
High-Speed-A-D-Converters-Eval-Kit High Speed A/D Converter Evaluation Kits 评估 Renesas