概览

The 650-12 is a low cost, low-jitter, high-performance clock synthesizer designed to produce fixed clock outputs of 13.5 MHz and 27.0 MHz, and four selectable clock outputs: two Processor Clocks (PCLK1) and PCLK2), an Audio Clock, and a Communications Clock (CCLK). Using analog Phase-Locked Loop (PLL) techniques, the device uses a 27.0 MHz clock or fundamental crystal to produce clocks ideal for Digital Video/MPEG-based applications.
  • Packaged in 20-pin tiny SSOP (QSOP)
  • RoHS 5 (green) or RoHS 6 (green and lead free)
    compliant package
  • Input frequency of 27.0 MHz
  • Zero ppm synthesis error in output clocks
  • Provides fixed 13.5 MHz and 27.0 MHz. Also provides two selectable processor clocks, one audio clock, and one communications clock.
  • Ideal for digital video MPEG-based applications
  • 3.3 V or 5.0 V operating voltage
  • Entire chip powers down (when CS1=CS0=0)

文档

= 相关文档
类型 文档标题 日期
数据手册
650-12 Datasheet
PDF 238 KB
1 item

设计和开发

ECAD 模块

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

扩展 ECAD 模块
Diagram of ECAD Models

产品选择

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    购买 / 样片
    器件号
    650R-12LF
    circle过时
    memory
    view_in_ar
    		QSOP 20 C Yes Tube
    650R-12LFT
    circle过时
    memory
    view_in_ar
    		QSOP 20 C Yes Reel
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