概览

简介

The IDT ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration. A FPGA mother board (Xilinx, Altera ) could be connected to ease the evaluation and analysis of the ADC dynamic and enable usage of the JESD204B full features sets.

特性

  • SMA connector for clock and analog input signals
  • JESD204B outputs up to 5 Gbps (HSMC connector)
  • Optional HSMC to FMC adaptor board
  • Single power supply (on-board regulators)

应用

文档

类型 文档标题 日期
手册 - 硬件 PDF 4.47 MB
手册 - 软件 ZIP 4.59 MB
原理图 PDF 4.20 MB
3 items