The 8T49N241 has one fractional-feedback PLL that can be used as a frequency translator with jitter attenuation or a frequency synthesizer. It is equipped with one integer and three fractional output dividers, allowing the generation of up to four different and unrelated output frequencies, ranging from 8 kHz to 1 GHz. Output frequencies can be completely independent of the input frequencies, and all four of these frequencies can be completely independent of each other. The four outputs may select among LVPECL, LVDS, HCSL or LVCMOS output levels.

The 8T49N241 is ideal for use in a wide range of equipment, including 10G/40G/100G SONET/SDH and Ethernet network line cards, wireless base station baseband units, broadcast video, carrier Ethernet switches, OTN, or in test and measurement applications. For example, the 8T49N241 can be used in GbE/10GbE/100GbE Synchronous Ethernet line card applications in order to preserve the G.8262 compliance from the Synchronous Equipment Timing Source (SETS) on the timing card.

IDT’s third generation Universal Frequency Translator family also includes the 8T49N242 (2-in / 1-PLL / 4-out), the 8T49N285 (2-in / 1-PLL / 8-out), the 8T49N286 (4-in / 2-PLL / 8-out) and the 8T49N287 (2-in / 2-PLL / 8-out). These devices are complemented by the 82P33714 and 82P33731 synchronous equipment timing source (SETS) for Synchronous Ethernet (SyncE) and 10G-40G SyncE, respectively.

To see other devices in this product family, visit the Universal Frequency Translators page.

特長

  • Compliant with the requirements outlined in Telcordia GR-253-CORE (SONET) & ITU-T G.813/G.8262 (SDH/SONET & SyncE) when paired with a Synchronous Equipment Timing Source (SETS ) device
  • Generates up to 4 LVPECL / LVDS/HCSL or 16 LVCMOS output clocks ranging from 8 kHz up to 1.0 GHz (diff), 8 kHz to 250 MHz (LVCMOS), that meet jitter limits for 10G up to 25G Ethernet applications
  • 0.35ps RMS (including spurs), 12 kHz to 20 MHz
  • Accepts up to two LVPECL, LVDS, LVHSTL, HCSL or LVCMOS input clocks ranging from 8 kHz up to 875 MHz
  • Auto and manual input clock selection with hitless switching
  • Clock input monitoring, including support for gapped clocks
  • Phase-Slope Limiting and Fully Hitless Switching options to control output phase transients
  • Operates from a 10 MHz to 50 MHz
  • Register programmable through I2C or via external I2C EEPROM
  • 8T49N241-998 “Boot from EEPROM”
  • 8T49N241-999 “powers up disabled”
  • Supported by IDT Timing Commander Software™

descriptionドキュメント

タイトル language 分類 形式 サイズ 日付
star 8T49N241 Datasheet データシート PDF 1.49 MB
Timing Commander Installation Guide ガイド PDF 497 KB
FemtoNG Universal Frequency Translator Ordering Product Information Guide マニュアル-ハードウェア PDF 270 KB
8T49N24x Evaluation Board User Guide マニュアル-ハードウェア PDF 1.41 MB
IDT Products for Wired Broadband Applications Application Brief PDF 686 KB
App Note 932 - Description for Startup and Calibration for UFT3G Family アプリケーションノート PDF 604 KB
8T49N24x EEPROM Programming Guide アプリケーションノート PDF 593 KB
8T49N24x Power-Up Configuration Guide アプリケーションノート PDF 175 KB
AN-828 Termination - LVPECL アプリケーションノート PDF 322 KB
8T49N24x Frequency Programming Guide アプリケーションノート PDF 198 KB
AN-893 8T49N241_2 Frequency Synchronization Compliance Report アプリケーションノート PDF 1.11 MB
AN-831 The Crystal Load curve アプリケーションノート PDF 395 KB
AN-844 Termination - AC Coupling Clock Receivers アプリケーションノート PDF 170 KB
AN-845 Termination - LVCMOS アプリケーションノート PDF 146 KB
AN-846 Termination - LVDS アプリケーションノート PDF 133 KB
AN-842 Thermal Considerations in Package Design and Selection アプリケーションノート PDF 495 KB
AN-840 Jitter Specifications for Timing Signals アプリケーションノート PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations アプリケーションノート PDF 115 KB
AN-839 RMS Phase Jitter アプリケーションノート PDF 233 KB
AN-832 Timing Budget and Accuracy アプリケーションノート PDF 131 KB
AN-833 Differential Input Self Oscillation Prevention アプリケーションノート PDF 180 KB
AN-834 Hot-Swap Recommendations アプリケーションノート PDF 153 KB
AN-835 Differential Input with VCMR being VIH Referenced アプリケーションノート PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels アプリケーションノート PDF 120 KB
AN-830 Quartz Crystal Drive Level アプリケーションノート PDF 143 KB
AN-815 Understanding Jitter Units アプリケーションノート PDF 565 KB
AN-827 Application Relevance of Clock Jitter アプリケーションノート PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance アプリケーションノート PDF 136 KB
AN-801 Crystal-High Drive Level アプリケーションノート PDF 202 KB
AN-805 Recommended Ferrite Beads アプリケーションノート PDF 121 KB
AN-806 Power Supply Noise Rejection アプリケーションノート PDF 438 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products アプリケーションノート PDF 108 KB
PCN# : 210023 Add Alternate Assembly Locations on Select VFQFN Packages 製品変更通知 PDF 726 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 製品変更通知 PDF 983 KB
PCN#: TP1901-01 Datasheet Correction for I2C Read Sequence Diagrams for the UFT Product Family 製品変更通知 PDF 454 KB
PCN# : N1805-01 Die Revision Change, 8T49N241-xxx Devices 製品変更通知 PDF 21 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location 製品変更通知 PDF 583 KB
PCN# : N1609-01 Minor Design Change on Select Devices 製品変更通知 PDF 227 KB
PCN# : W1512-01 Wafer Size change from 200mm to 300mm at Global Foundries 製品変更通知 PDF 188 KB
8T49N24x Example Timing Commander Configuration and Phase Noise Plots その他資料 ZIP 1.04 MB
IDT Clock Generation Overview 概要 PDF 1.83 MB
IDT Jitter Attenuator Product Overview 概要 PDF 1.95 MB
82P33714/31 SETS and 8T49N24x Universal Frequency Translators Product Brief 製品概要 PDF 370 KB
8T49N241/8T49N242 Universal Frequency Translators Product Brief (Japanese) English 製品概要 PDF 124 KB
8T49N24x Schematics Review Checklist 回路図 XLSX 550 KB
8T49N24x EVB Schematic 回路図 PDF 74 KB
IDT Clocks for Xilinx Ultrascale FPGAs 技術概要 PDF 256 KB
IDT Clocks for Altera's Stratix V and Arria V/X FPGAs 技術概要 PDF 238 KB
IDT Clocks for SMPTE and Xilinx® 7 Series FPGAs 技術概要 PDF 566 KB

file_downloadダウンロード

タイトル language 分類 形式 サイズ 日付
Timing Commander Installer (v1.17) ソフトウェア/ツール-その他 ZIP 18.02 MB
8T49N24x Timing Commander Personality File (v1.7.3) ソフトウェア/ツール-ソフトウェア ZIP 6.71 MB
8T49N241 IBIS Model モデル-IBIS ZIP 331 KB
8T49N24x Design Files (Schematic Symbol and PCB Footprint) PCB設計ファイル ZIP 12 KB

memoryボード&キット

製品名 タイトル 分類 会社名
8T49N241-EVK Evaluation Kit for 8T49N241 Evaluation Renesas