概要

説明

The 8523I-03 is a low skew, high performance 1-to-4 Differential-to-LVHSTL fanout buffer. The 8523I-03 has two selectable clock inputs. The input pairs can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8523I-03 ideal for those applications demanding well defined performance and repeatability.

特長

  • 4 differential LVHSTL compatible outputs
  • Selectable differential CLK0, nCLK0 and CLK1, nCLK1 clock inputs
  • Clock input pairs can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
  • Maximum output frequency: 650MHz
  • Translates any single-ended input signal to LVHSTL levels with resistor bias on nCLK input
  • Output skew: 50ps (maximum)
  • Part-to-part skew: 400ps (maximum)
  • Propagation delay: 1.2ns (typical)
  • VOH = 1V (maximum)
  • 3.3V core, 1.8V output operating supply
  • Lead-Free package available
  • -40°C to 85°C ambient operating temperature

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