概要

The 9DS400 is a 4-output PCIe PLL with the ability to inject spread spectrum onto the incoming differential clock, while maintaining good phase noise.

9DS400 - Block Diagram
9DS400 - Pinout
9DS400 - Block Diagram
9DS400 - Pinout
  • 4- 0.7V current-mode differential output pairs
  • Supports Spread Injection mode and fanout mode
  • Two pin selectable down spread amounts: 0.5% and 0.25%
  • 50-110 MHz operation in PLL mode
  • 50-400 MHz operation in Bypass mode
  • Bypass mode
  • Supports undriven differential outputs in PD# and SRC_STOP# modes for power management
  • Output cycle-cycle jitter < 50ps
  • Output to Output skew <50ps
  • Phase jitter: PCIe Gen1 < 86ps peak to peak
  • Phase jitter: PCIe Gen2 < 3.0/3.1ps rms

ドキュメント

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ECADモデル

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Diagram of ECAD Models

製品選択

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    ご購入 / サンプル
    型名
    9DS400AGLF
    circle廃止品
    memory
    view_in_ar
    		TSSOP 28 C Yes Tube
    9DS400AGLFT
    circle廃止品
    memory
    view_in_ar
    		TSSOP 28 C Yes Reel
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