SH-Navi2V (SH7774)
Overview
The SH-Navi2V is a SoC for car navigation systems incorporating image recognition processing functions. Built around the SH-4A and with a high operation frequency of 600 MHz, its many peripheral functions include a 2-D graphics engine, an audio encoder, and an Ethernet interface.
The SH-4A CPU core delivers superior processing performance of 1GIPS or more at its maximum operating frequency of 600 MHz, and the FPU provides excellent processing performance of 4.2 GFLOPS.
System Block Diagram
Specification
| Item | SH-Navi2V Specifications |
|---|---|
| Type name | R8A77740DBGV |
| Power supply voltage | 1.1 V (internal) / 3.3 V, 1.8 V (external) |
| Maximum operating frequency | 600 MHz |
| Processing performance | 1,080 MIPS, 4.2 GFLOPS (at 600 MHz operation) |
| CPU core | SH-4A core |
| On-chip RAM | ILRAM: 8 Kbytes, + OLRAM: 16 Kbytes, URAM: 128 Kbytes |
| Cache memory | 4-way set associative type, with separate 32 Kbytes for instructions and 32 Kbytes for data |
| External memory | DDR2-SDRAM directly connectable via memory controller SRAM and ROM directly connectable via bus state controller |
| Extension bus | Address space : 64 Mbytes × 3 |
| Main on-chip peripheral functions |
2D graphics engine, display control Video input interface × 2 channels Image recognition processing accelerator AAC audio encoder Various sound interfaces × 7 channels ATAPI interface Controller Area Network (CAN) interface × 1 channel Ethernet interface (10/100 Base) Dedicated DMAC × 22 channels Serial communication interface × 3 channels Timer × 9 channels On-chip debugging function Interrupt controller Clock pulse generator: built-in multiplication PLL |
| Power-down modes |
Sleep mode DDR-SDRAM power supply backup mode |
| Package | 554-pin BGA (29 mm x 29 mm) |
