ISL6381

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EAPP Hybrid Digital 4-Ph Green PWM Controller for Core and Memory Power with AUTO Phase Shedding

Product Status: Mass Production

OVERVIEW

The ISL6381 is an EAPP Hybrid Digital 4-Phase PWM controller and is designed to be compliant to Intel VR12.5/VR12 specifications and control the microprocessor core or memory voltage regulator. It includes programmable functions and telemetries for easy use, high system flexibility and overclocking applications using SMBus, PMBus, or I2 C interface, which is designed to be conflict free with CPU’s SVID bus. This hybrid digital approach eliminates the need of NVM and Firmware often seen in a full digital solution and significantly reduces design complexity, inventory and manufacturing costs.

The ISL6381 utilizes Intersil's proprietary Enhanced Active Pulse Positioning (EAPP) modulation scheme to achieve the extremely fast transient response with fewer output capacitors. The ISL6381 accurately monitors the load current via the IMON pin and reports this information via the IOUT register to the microprocessor, which sends a PSI# signal to the controller at low power mode via SVID bus. The controller enters 1- or 2-phase operation in low power mode (PSI1); in the ultra low power mode (PSI2, PSI3), it operates in single phase with diode emulation option. In low power modes, the magnetic core and switching losses are significantly reduced, yielding high efficiency at light load. After the PSI# signal is deasserted, the dropped phase(s) are added back to sustain heavy load transient response and efficiency. In addition, the ISL6381 features auto-phase shedding to optimize the efficiency from light to full load for Green Environment without sacrificing the transient performance.

Today’s microprocessors require a tightly regulated output voltage position versus load current (droop). The ISL6381 senses the output current continuously by measuring the voltage across a dedicated current sense resistor or the DCR of the output inductor. The sensed current flows out of the FB pin to develop the precision voltage drop across the feedback resistor for droop control. Current sensing circuits also provide the needed signals for channel-current balancing, average overcurrent protection and individual phase current limiting. The TM pin senses an NTC thermistor’s temperature, which is internally digitized for thermal monitoring and for integrated thermal compensation of the current sense elements of the regulator.

The ISL6381 features remote voltage sensing and completely eliminates any potential difference between remote and local grounds. This improves regulation and protection accuracy. The threshold-sensitive enable input is available to accurately coordinate the start-up of the ISL6381 with other voltage rails.

KEY FEATURES

  • Intel VR12.5/VR12 compliant
  • SerialVID with programmable IMAX, TMAX, BOOT, ADDRESS OFFSET registers
  • VR12.5 core and VR12/VR12.5 memory
  • Intersil’s proprietary EAPP Hybrid Digital Enhanced Active Pulse Positioning (EAPP) Modulation Scheme (Patented)
  • SMBus/PMBus/I2C interface with SVID conflict free
  • NVM and firmware free for low cost and easy use
  • Auto phase shedding option for greener environment
  • Variable frequency control during load transients to reduce beat frequency oscillation
  • Linear control with evenly distributed PWM pulses for better phase current balance during load transients
  • Voltage feed-forward and ramp adjustable options
  • High frequency and PSI compensation options
  • Proprietary active phase adding and dropping with diode emulation scheme for enhanced light load efficiency
  • 1 to 4-Phase with phase doubler compatibility
  • Differential remote voltage sensing
  • ±0.5% closed-loop system accuracy over load, line and temperature
  • Programmable 1 or 2-phase operation in PSI1 mode
  • Programmable slew rate of fast dynamic VID with Dynamic VID Compensation (DVC)
  • Droop and diode emulation options
  • Precision resistor or DCR differential current sensing
  • Integrated programmable current sense resistors
  • Accurate load-line (droop) programming
  • Accurate current monitoring and channel-current balancing
  • True Catastrophic Failure Protection (CFP)
  • Average overcurrent protection and channel current limit with internal current comparators
  • Precision overcurrent protection on IMON pin
  • Output voltage open sensing protection
  • Protection disable option
  • Accurate load-line (droop) programming
  • Up to 2MHz per phase
  • Thermal monitoring and integrated compensation
  • Start-up into precharged load
  • Pb-free (RoHS compliant)
  • 40 Ld 5x5 TQFN

BLOCK DIAGRAM

 Block Diagram

PARAMETRICS

Parameters
ISL6381
Basic Information
Production Status
Mass Production
Max # of Outputs
1
Max # of Phases
4
Input Voltage Min (V)
4.5
Input Voltage Max (V)
14
Output Voltage Min (V)
0.25
Output Voltage Max (V)
3.04
Output Current Max (A)
190
Bias Voltage Range (V)
4.75 to 5.25
VID
Yes
Parametric Applications
VR12.5/VR12
Qualification Level
Standard
Droop
Yes
Integrated MOSFET Driver (s)
No
Can Sample
YES
Temperature Range
0 to +70

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