HIP2105

Low Voltage Driver for Synchronous Rectification

Product Status: Mass Production

OVERVIEW

The HIP2105 and HIP2106A are high frequency MOSFET drivers optimized to drive two N-channel power MOSFETs in a synchronous buck converter topology. The HIP2105 has HI/LI inputs and the HIP2106A has a single PWM input. Both these drivers, combined with Renesas multi-phase buck PWM controllers, form a complete single-stage core-voltage regulator solution with high-efficiency performance at high switching frequency for advanced microprocessors.

The HIP2105 and HIP2106A are biased by a single low voltage supply (5V), minimizing driver switching losses in high MOSFET gate capacitance and high switching frequency applications. Each driver is capable of driving a 3nF load with less than 15ns rise/fall time. Bootstrapping of the upper gate driver is implemented using an internal low forward voltage drop diode, reducing implementation cost, complexity, and allowing the use of higher performance, cost effective N-channel MOSFETs. Adaptive shoot-through protection on the HIP2106A is integrated to prevent both MOSFETs from conducting simultaneously.

The HIP2105 and HIP2106A feature a 4A typical sink current for the lower gate driver, enhancing the lower MOSFET gate hold-down capability during PHASE node rising edge, preventing power loss caused by the self turn-on of the lower MOSFET due to the high dV/dt of the switching node.

The HIP2106A also features an input that recognizes a high-impedance state, working together with Renesas multi-phase 3.3V or 5V PWM controllers to prevent negative transients on the controlled output voltage when operation is suspended. This feature eliminates the need for the Schottky diode that may be used in a power system to protect the load from negative output voltage damage.

KEY FEATURES

  • Adaptive shoot-through protection (HIP2106A only)
  • HI and LI inputs (HIP2105 only)
  • 0.4Ω ON-resistance and 4A sink current capability
  • Low tri-state hold-off time (20ns) (HIP2106A only)
  • Supports 3.3V and 5V HI/LI or PWM input
  • Power-On Reset (POR)
  • Dual Flat No-Lead (DFN) package
    - Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat No Leads - product outline
    - Near chip-scale package footprint; improves PCB efficiency and thinner in profile

BLOCK DIAGRAM

 Block Diagram

PARAMETRICS

Parameters
HIP2105
Basic Information
Production Status
Mass Production
VDRIVE (V)
5
Output Per Driver UGATE Source|Sink (A)
2|2
Output Per Driver LGATE Source|Sink (A)
2|4
Phase Voltage Max (V)
GND - 0.3VDC GND - 8V (<20ns)
No Load IS (max) (mA)
Almost negligible
IS
0.19 mA
Qualification Level
Standard

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