HD6417709SF133BV

The SH7709S microprocessor incorporates the 32-bit SH-3 CPU. This LSI is built in with a variety of peripheral functions such as cache memory, memory management unit (MMU), interrupt controller, timer, three serial communication interfaces, realtime clock (RTC), use break controller (UBC), bus state controller (BSC) and I/O ports. This LSI can be used as a microcomputer for devices that require both high speed and low power consumption.

Recommended Product
D6417709SF133BV
Production Status
Mass Production

PARAMETRICS

Parameters
HD6417709SF133BV
Memory
Program memory
0 KB ROMless
RAM
0 KB
Cache Memory Remark
16-kbyte cache, mixed instruction/data, 256 entries, 4-way set associative
CPU (Bit, Clock, DMA, External Bus etc)
CPU
SH-3 (32-bit)
Max. Frequency
133 MHz
PLL
YES
Real-Time Clock (RTC)
YES
Power-On Reset
YES
Memory Management Unit
YES
DMA Remarks
DMAC x 4 ch
External Address/Data Bus
YES
External Interrupt Pins
23
I/O Ports
96
Timers
16-bit Timers
1 ch
32-bit Timers
3 ch
Watchdog Timers
1 ch
Analog
A/D Converters
10-bit x 8 ch
D/A Converters
8-bit x 2 ch
Interfaces
CSIs
1 ch
UARTs
3 ch
Serial Interface Remarks
SCI (CSI:1ch/UART:1ch), IrDA (UART:1ch), SCIF (UART:1ch)
Operating Conditions
Operating Voltage
3 to 3.6 V
Power Supply
VccQ = 3.3 ± 0.3 V, VccQ = 1.55 to 2.15 V, AVcc = 3.3 ± 0.3 V
Operating Temperature
-20 to 75 ℃ (Ambient Temperature)

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Hardware Design Support

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IBIS/BSDL IBIS standard simulation data is required for high-speed board design and can be used to run simulations to examine and troubleshoot issues such as waveform reflection, ringing, and so on, before producing the actual board.
BSDL is a data input format supported by most IEEE 1149.1 (JTAG)-compliant tools. The automatic test pattern generation (ATPG) and automatic test equipment functions of these tools facilitate testing.
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