SH72A0, SH72A2 Group microcontrollers are equipped with an SH-2A CPU core, and have a compact package and a maximum operating frequency of 100 MHz. Other on-chip functions include functions suitable for motor control, such as a motor control timer (MTU-III) that can control a three-phase brushless motor, and a 12-bit A/D converter; and communication functions, such as CAN, LIN, and other serial interfaces with chip select/buffer. In addition, these microcontrollers achieve 100 MHz high-speed operation even on a single power supply and with a low consumption current.


Main Solutions

Key Features:

  • SH2A-FPU core *FPU option
    • Maximum operating frequency:
      100 MHz (SH72A2)
      80 MHz (SH72A0)
  • ROM: Max. 512 KB, RAM: Max. 64 KB, data flash: Max. 32 KB
  • Compare match timer (CMT): 16-bit timer x 6 channels (2 channels x 3 units)
  • 16-bit timer pulse unit (TPU): 16-bit timer x 16 channels (4 channels x 4 units)
    • Compare match, PWM waveform output, input capture
  • Multifunction timer pulse unit (MTU-III): 16-bit timer x 8 channels
    Output compare: 24 channels (SH72A2), 18 channels (SH72A0)
    Input capture: 27 channels (SH72A2), 18 channels (SH72A0)
    • Three-phase motor control function x 2
  • 12-bit A/D converter: 6 channels (6 channels of simultaneous sample and hold)
  • 10-bit A/D converter: 24 channels (SH72A2), 8 channels (SH72A0)
  • Serial communication interface (SCI)
    • Clock synchronous/asynchronous shared x 4 channels (SH72A2)
    • Clock synchronous/asynchronous shared x 3 channels, asynchronous x 1 channel (SH72A0)
  • Serial bus interface (SBI)
    • Four-line clock synchronous x 4 channels (SH72A2) or 3 channels (SH72A0)
      - Transfer bit length: Max. 32 bits
      - Transmit/receive buffer: Max. 128 bits
  • LIN: 2 channels (SH72A2), 1 channel (SH72A0)
  • CAN: 2 channels
  • Packages
    64-pin QFP (SH72A0)
    100-pin QFP (SH72A2)


Pin Count / Memory Size Lineup:

Program Flash

Below you will find information to support the development of your application.
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