These microcontrollers employ the RL78 core which realizes high processing performance while delivering the lowest power consumption in their class, and have enhanced computing power and peripheral functions suitable for motor control and other applications.

In addition to a high-precision (±1%) on-chip oscillator enabling 32 MHz CPU operation and other standard on-chip functions from the RL78/G13, the microcontrollers have multiply and divide and multiply-accumulate instructions capable of faster processing than the RL78/G13, and functions from the R8C Family with proven track records, such as timers RD/RG, data transfer controller, and event link controller, helping to lower the total cost of building a system and contributing to more compact size and lower power consumption.

In addition, abundant functions for supporting functional safety, such as an A/D converter testing function, are also on-chip. With 32 and 64-pin packages, these products are suitable for inverter motor control, software modem, home appliances, mobile devices, healthcare devices, and other consumer electronics, office equipment, industrial equipment, and so on.

Pin Count / Memory Size Lineup

R7F0C014-Pin Count / Memory Size Lineup

Block Diagram

Key Features

  • Minimum instruction execution time can be changed from high speed (0.03125 μs: @ 32 MHz operation with high-speed on-chip oscillator clock) to ultra low-speed (30.5 μs: @ 32.768 kHz operation with subsystem clock)
  • Geral-purpose register: (8-bit register x 8) x 4 banks
  • ROM: 128 KB, RAM: 8 KB, Data flash memory: 8 KB
  • High-speed on-chip oscillator clocks
    Selectable from 64 MHz (TYP.), 48 MHz (TYP.), 32 MHz (TYP.), 24 MHz (TYP.), 16 MHz (TYP.), 12 MHz (TYP.), 8 MHz (TYP.), 4 MHz (TYP.), and 1 MHz (TYP.)
  • On-chip single-power-supply flash memory (with prohibition of block erase/writing function)
  • Self-programming (with boot swap function/flash shield window function)
  • On-chip debug function
  • On-chip power-on-reset (POR) circuit and voltage detector (LVD)
  • On-chip watchdog timer (operable with the dedicated low-speed on-chip oscillator clock)
  • Multiply/divide/multiply & accumulate instructions are supported.
  • On-chip key interrupt function
  • On-chip clock output/buzzer output controller
  • On-chip BCD adjustment
  • I/O ports: 28 to 58 (N-ch open drain: 3 to 4)
  • Timer
    • 16-bit timer: 7 channels (TAU: 4 channels, Timer RJ: 1 channel, Timer RD: 2 channels)
    • Watchdog timer: 1 channel
    • Real-time clock: 0 or 1 channel (correction clock output)
    • 12-bit interval timer: 1 channel
  • Serial interface
    • CSI
    • UARTUART (LIN-bus supported)
    • I2C/Simplified I2C communication
  • Different potential interface: Can connect to a 2.5/3 V device when operating at 4.0 V to 5.5 V
  • 8/10-bit resolution A/D converter (VDD = EVDD = 1.6 to 5.5 V): 8 or 12 channels
  • Standby function: HALT, STOP, SNOOZE mode
  • On-chip data transfer controller (DTC)
  • On-chip event link controller (ELC)
  • Power supply voltage: VDD = 1.6 to 5.5 V
  • Operating ambient temperature: TA = −40 to +85°C
    Remarks The functions mounted depend on the product. See Hardware User Manual 1.6 Outline of Functions
  • ROM, RAM capacities
Flash ROM Data Flash RAM
32 pins 64 pins
128KB 8KB 8KB Note R7F0C014B2D R7F0C014L2D

Note: This is about 7 KB when the self-programming function and data flash function are use.

Outline of Functions

Item 32 pins 64 pins
R7F0C014B2D R7F0C014L2D
Code flash memory 128KB
Data flash memory 8KB
Address space 1 MB
Main system clock High-speed system clock X1 (crystal/ceramic) osillation, external main system clock input (EXCLK)
1 to 20MHz:VDD=2.7 to 3.6V
1 to 8MHz:VDD=1.8 to 2.7V
1 to 4MHz:VDD=1.6 to 1.8V
Hi-speed on-chip oscillator clock(fIH HS (High-speed operation:1 to 32MHz (VDD=2.7 to 5.5V)
HS (High-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V)
LS (Low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 5.5 V)
LV (Low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V)
Accuracy ± 2%
Subsystem -   XT1 (crystal) oscillation,
external subsystem clock input
(EXCLKS) 32.768 kHz:
VDD = 1.6 to 5.5 V
Low-speed on-chip oscillator clock 15kHz (TYP.):VDD=1.6 to 5.5V
General-purpose registers 8 bits × 32 registers (8 bits × 8 registers × 4 banks)
Minimum instruction execution time 0.03125μs (High-speed on-chip oscillator:fIH=32MHz operation)
0.05μs(High-speed system clock:fMX=20MHz operation)
- 30.5 μs
(Subsystem clock: fSUB = 32.768 kHz operation)
Instruction set Data transfer(8/16 bits)
Adder and subtractor/logical operation(8/16 bits)
Multiplication (8 bits × 8 bits, 16 bits × 16 bits), Division (16 bits ÷ 16 bits, 32 bits ÷ 32 bits)
Multiplication and Accumulation (16 bits × 16 bits + 32 bits)
Rotate, barrel shift, and bit manipulation (set, reset, test, and boolean operation), etc
I/O port Total 28 58
CMOS input 3 5
CMOS output - 1
N-ch O.D I/O
(6V tolerance)
Timer 16-bit timer 7 channels (TAU: 4 channels, Timer RJ: 1 channel, Timer RD: 2 channels)
Watchdog timer 1 channel
Real Time clock (RTC) - 1 channel
12-bit interval timer 1 channel
Timer output Timer outputs: 14 channels
PWM outputs: 9 channels
RTC output - 1
 1 Hz (subsystem clock: fSUB = 32.768 kHz)
Clock output/buzzer output [32-pin products]
• 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz
(Main system clock: fMAIN = 20 MHz operation)

[64-pin products]
• 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz
(Main system clock: fMAIN = 20 MHz operation)
• 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.096 kHz, 8.192 kHz, 16.384 kHz, 32.768 kHz
(Subsystem clock: fSUB = 32.768 kHz operation)
8/10 bit resolution A/D converter 8 channels 12 channels
Serial interface [32-pin products]
• CSI: 1 channel/UART (UART supporting LIN-bus): 1 channel/simplified I2C: 1 channel
• CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel
• CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel

[64-pin products]
• CSI: 2 channels/UART (UART supporting LIN-bus): 1 channel/simplified I2C: 2 channels
• CSI: 2 channels/UART: 1 channel/simplified I2C: 2 channels
• CSI: 2 channels/UART: 1 channel/simplified I2C: 2 channels
I2C bus 1 channel 1 channel
Data transfer controller (DTC) 26 sources 29 sources
Event link controller(ELC) Event input:16
Event trigger output:6
Event input:18
Event trigger output:6
Vectored interrupt sources Internal 22
External 6 13
Key interrupt - 8
Reset Reset by RESET pin
Internal reset by watchdog timer
Internal reset by power-on-reset
Internal reset by voltage detector
Internal reset by illegal instruction executionNote
Internal reset by RAM parity error
Internal reset by illegal-memory access
Power-on-reset circuit Power-on-reset:1.51±0.03V
Voltage detector 2.75 V to 4.06 V (6 stages)
On-chip debug function Provided
Power supply voltage VDD=1.6 to 5.5V
Operating ambient temperature TA=–40 to +85°C


This is about 0.5 KB when the self-programming function and data flash function are used. (For details, see Hardware User Manual CHAPTER 3).
The illegal instruction is generated when instruction code FFH is executed.
Reset by the illegal instruction execution not is issued by emulation with the in-circuit emulator or on-chip debug emulator.

Key Applications

PLC/RF modem, HA/Industrial front panel, Motor control and other consume.

Product Lineup

Document Part No Program Memory
Operating Voltage (V) Package code Production Packing/Lead free Order part no
Chinese English
PDF PDF R7F0C014B2DFP-C 128 8 1.6 PLQP0032GB-A
32-pin plastic
Mass production Tray/Lead free (Pure Sn) R7F0C014B2DFP-C#AA0
R7F0C014L2DFB-C 128 8 PLQP0064KF-A
64-pin plastic LQFP(10x10)
64-pin plastic
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