The Renesas ALVC (advanced low-voltage CMOS) logic family is a high-performance bus interface component intended for low-voltage applications. The ALVC family is fully compatible with industry-standard components with similar designations and it is specified for both 3.3 V and 2.5 V operation. Renesas offers three-state buffers, drivers, latches, and transceivers in 16-bit or 32-bit bus widths.
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The Renesas ALVC family has three basic options available: high drive, balanced drive and bus-hold.
- High Drive (+/-24mA) ALVC parts are suitable for heavy loads.
- Balanced drive ALVC parts use internal series resistors to control the rising and falling edges of the output waveforms and provides superior low noise performance by controlling the output edge rate and providing partial series termination of all output signals without sacrificing speed performance. Additional line termination is unnecessary in most applications. The symmetric drive capability will drive a transmission line both high and low with similar edge rates, solving most line balance and termination problems.
- Bus-Hold ALVC parts retain the last active state on a bus when the bus is disabled or has no active driver.