Overview

Description

JEDEC compliant Advanced Memory Buffer for Fully buffered DIMMs. 3.2, and 4.0 Gb/s serial speeds (DDR2-533/667 and 800 DRAM). Support for up to eight DIMMs per channel

Features

  • Leverages high-speed serial technology for DRAM interface.
  • Supports 3.2, 4.0 and 4.8 Gbits serial speeds (DDR2-533/667/800)
  • Support for 14 northbound lanes (read) and 10 southbound lanes (write)
  • Support for up to 8 DIMMs per channel
     

Comparison

Applications

Documentation

Type Title Date
End Of Life Notice PDF 15 KB
Flyer PDF 728 KB
2 items

Design & Development

Models