The 841N4830 is a 3 HCSL, 1 LVPECL and 2 LVCMOS output Synthesizer optimized to generate PCI Express reference clock frequencies. The device uses IDT's fourth generation FemtoClock® NG technology for synthesis of high clock frequency at very low phase noise. It provides low power consumption with good power supply noise rejection. Using a 25MHz, 12pF parallel resonant crystal, the following frequencies can be generated: 100MHz, 50MHz and 25MHz. Maximum rms phase jitter of 0.27ps, easily meets PCI Express jitter requirements. The 841N4830 is packaged in a small 32-pin VFQFN package.


  • Fourth generation FemtoClock® Next Generation (NG) technology
  • Three differential HCSL outputs, one differential LVPECL and two single-ended LVCMOS/LVTTL outputs
  • Crystal oscillator interface designed for a 25MHz, 12pF parallel resonant crystal
  • CLK/nCLK input pair can accept the following differential input levels: LVPECL, LVDS, HCSL
  • A 25MHz crystal generates output frequencies of: 100MHz, 50MHz and 25MHz
  • VCO frequency: 2GHz
  • RMS Phase Jitter @ 100MHz, (12kHz – 20MHz) using a 25MHz crystal: 0.36ps (maximum)
  • Power supply noise rejection PSNR: -45dB (typical)
  • PCI Express Gen 2 (5 Gb/s) jitter compliant
  • Full 3.3V supply mode
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 32 I Yes Tray
Active VFQFPN 32 I Yes Reel
Active VFQFPN 32 I Yes Reel

Documentation & Downloads

Title language Type Format File Size Date
Datasheets & Errata
841N4830 Datasheet Datasheet PDF 888 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 133 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products Application Note PDF 108 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN# : A1807-01 Gold wire to Copper Wire Product Change Notice PDF 32 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : W1308-01 Change of Passivation Thickness Product Change Notice PDF 941 KB
PCN# : N1206-01 New Die Revision 841N4830AKILF Product Change Notice PDF 55 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB