The 843N252-45 is a 1 LVPECL and 1 LVCMOS output Synthesizer optimized to generate Ethernet reference clock frequencies. The device uses IDT's fourth generation FemtoClock ® NG technology for an optimum of high clock frequency and low phase noise performance, combined with a low power consumption and high power supply noise rejection. Using a 25MHz parallel resonant crystal, the following frequencies can be generated: 156.25MHz and 125MHz. With a very low phase noise VCO it is targeted to achieve 0.4ps or lower typical rms phase jitter, easily meeting Ethernet jitter requirements. The 843N252-45 is packaged in a small 16-pin TSSOP package.

Features

  • Fourth generation FemtoClock® Next Generation (NG) technology
  • One differential 3.3V LVPECL output and one LVCMOS/LVTTL output
  • Crystal oscillator interface designed for a 25MHz parallel resonant crystal
  • A 25MHz crystal generates output frequencies of: 156.25MHz and 125MHz
  • VCO frequency: 625MHz
  • RMS Phase Jitter @ 156.25MHz, (12kHz – 20MHz) using a 25MHz crystal: 0.33ps (typical)
  • RMS Phase Jitter @ 125MHz, (12kHz – 20MHz) using a 25MHz crystal: 0.39ps (typical)
  • Power supply noise rejection PSNR: -60dB (typical)
  • Full 3.3V supply mode
  • 0°C to 70°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active TSSOP 16 C Yes Tube
Availability
Active TSSOP 16 C Yes Reel
Availability

Documentation

Title language Type Format File Size Date
Datasheets & Errata
843N252-45 Datasheet Datasheet PDF 381 KB
Errata# NEN-11-03 Errata PDF 62 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 133 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products Application Note PDF 108 KB
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : TB1403-01 Changed in Carrier Tape, Plastic Reel and Quantity per Reel on TSSOP-14, TSSOP-16 Product Change Notice PDF 663 KB
PCN# : W1308-01 Change of Passivation Thickness Product Change Notice PDF 941 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
Other
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB