Clocks & Timing

Overview

The 843201-375 is a low phase-noise frequency margining synthesizer. In the default mode, the device nominally generates a 375MHz LVPECL output clock signal from a 25MHz crystal input. There is also a frequency margining mode available where the device can be configured, using control pins, to vary the output frequency up or down from nominal by 5%. The 843201-375 is provided in a 16-pin TSSOP package.

843201-375 - Block Diagram
843201-375 - Block Diagram
  • One 375MHz nominal LVPECL output
  • Crystal oscillator interface designed for 25MHz, 18pF parallel resonant crystal
  • Output frequency can be varied ± 5% from nominal
  • VCO range: 700MHz - 800MHz
  • RMS phase jitter @ 375MHz, using a 25MHz crystal, (12kHz - 20MHz): 0.72ps (typical) @ 3.3V
  • Output supply modes
    Core/Output
    3.3V/3.3V
    3.3V/2.5V
    2.5V/2.5V
  • 0°C to 70°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Documentation

Title Type Date
843201-375 Datasheet
PDF363 KB
Datasheet
AN-805 Recommended Ferrite Beads
PDF91 KB
Application Note
AN-827 Application Relevance of Clock Jitter
PDF1.99 MB
Application Note
AN-828 Termination - LVPECL
PDF322 KB
Application Note
AN-831 The Crystal Load curve
PDF395 KB
Application Note
AN-842 Thermal Considerations in Package Design and Selection
PDF495 KB
Application Note
AN-840 Jitter Specifications for Timing Signals
PDF442 KB
Application Note
AN-838 Peak-to-Peak Jitter Calculations
PDF115 KB
Application Note
AN-839 RMS Phase Jitter
PDF233 KB
Application Note
AN-832 Timing Budget and Accuracy
PDF131 KB
Application Note
AN-834 Hot-Swap Recommendations
PDF153 KB
Application Note
AN-837 Overdriving the Crystal Interface
PDF133 KB
Application Note
AN-830 Quartz Crystal Drive Level
PDF143 KB
Application Note
AN-815 Understanding Jitter Units
PDF565 KB
Application Note
AN-802 Crystal-Measuring Oscillator Negative Resistance
PDF136 KB
Application Note
AN-801 Crystal-High Drive Level
PDF202 KB
Application Note
AN-806 Power Supply Noise Rejection
PDF438 KB
Application Note
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products
PDF108 KB
Application Note
PDN# : CQ-15-04 Quarterly Market Declined PDN
PDF545 KB
End Of Life Notice
IDT Clock Generation Overview
PDF1.83 MB
Overview
PCN# : TB1403-01 Changed in Carrier Tape, Plastic Reel and Quantity per Reel on TSSOP-14, TSSOP-16
PDF663 KB
Product Change Notice
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products
PDF361 KB
Product Change Notice

Design & Development

Software Downloads

Title Type Date
PDN# : CQ-15-04 Quarterly Market Declined PDN
PDF545 KB
End Of Life Notice

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Explore ECAD Models

Product Options

    Processing table
    Part Number
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    843201AG-375LFT
    block_flippedObsolete
    memory
    view_in_ar
    		TSSOP 16 C Yes Reel
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