The 814S208I is an eight LVDS output clock synthesizer designed for wireless infrastructure applications. The device generates eight copies of a selectable 122.88MHz or 153.6MHz clock signal with excellent phase jitter performance. The PLL is optimized for a reference frequency of 30.72MHz. Both a crystal interface and a differential system clock input are supported for the reference frequency. An extra LVDS output duplicates the reference frequency and is provided for clock tree cascading. The device uses IDT's third generation FemtoClock® technology for an optimum of high clock frequency and low phase noise performance, combined with a low power consumption. A PLL lock status output is provided for monitoring and diagnosis purpose. The device supports a 3.3V voltage supply and is packaged in a small, lead-free (RoHS 6) 48-lead VFQFN package. The extended temperature range supports wireless infrastructure, telecommunication and networking end equipment requirements.


  • Third generation FemtoClock® technology
  • Selectable 122.88MHz or 153.6MHz output clock synthesized from a 30.72MHz fundamental mode crystal
  • Eight differential LVDS clock outputs
  • Differential reference clock input pair
  • PLL lock indicator output
  • Crystal interface designed for a 30.72MHz, parallel resonant crystal
  • RMS phase jitter @ 122.88MHz, using a 30.72MHz crystal (12kHz - 20MHz): 0.650ps (typical)
  • RMS phase jitter @ 153.6MHz, using a 30.72MHz crystal (12kHz - 20MHz): 0.642ps (typical)
  • LVCMOS interface levels for the control input
  • Full 3.3V supply voltage
  • Available in Lead-free (RoHS 6) 48-lead VFQFN package
  • -40°C to 85°C ambient operating temperature

Product Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 48 I Yes Tray
Active VFQFPN 48 I Yes Reel

Documentation & Downloads

Title language Type Format File Size Date
Datasheets & Errata
814S208I Final Datasheet Datasheet PDF 1.85 MB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-846 Termination - LVDS Application Note PDF 133 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 133 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products Application Note PDF 108 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
PCN# : A1403-03 Gold wire to Copper wire Product Change Notice PDF 42 KB
ICS814S208 IBIS Model Model - IBIS ZIP 66 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB