The 8V44S269 is a ten LVDS/LVTTL output clock synthesizer designed for instrumentation and wireless applications. The device generates four copies of a 125MHz, two copies of a 100MHz differential LVDS clock and one 50MHz (LVCMOS) signal with excellent phase jitter performance. The PLL is optimized for a reference frequency of 25MHz. Both a crystal interface and a single-ended input are supported for the reference frequency. Three LVCMOS outputs duplicate the reference frequency and are provided for clock tree cascade purpose. Each of the four LVCMOS outputs can be supplied with either 3.3V, 2.5V or 1.8V, forming the respective LVCMOS output levels of 3.3V, 2.5V or 1.8V. The device uses IDT’s third generation FemtoClock® technology for an optimum of high clock frequency and low phase noise performance, combined with a low power consumption. The device supports a 3.3V voltage supply and is packaged in a small, lead-free (RoHS 6) 48-lead VFQFN package.


  • Third generation FemtoClock® technology
  • 125MHz, 100MHz and 50MHz output clocks synthesized from a 25MHz reference clock or fundamental mode crystal
  • Six differential LVDS clock outputs
  • QA[0:3] outputs (125MHz) are LVDS compatible
  • QB[0:1] outputs (100MHz) are LVDS compatible
  • Four single-ended LVCMOS-compatible reference clock outputs
  • QC output (50MHz) is LVCMOS 3.3V, 2.5V or 1.8V compatible
  • QREF[0:2] (25MHz) are LVCMOS 3.3V, 2.5V or 1.8V compatible
  • Crystal interface designed for 25MHz XTAL
  • RMS phase jitter @ 125MHz, using a 25MHz crystal
    (12kHz - 20MHz): 0.57 (typical)
  • RMS phase jitter @ 100MHz, using a 25MHz crystal
    (12kHz - 20MHz): 0.58 (typical)
  • LVCMOS interface levels for the control input
  • I/O supply voltages for LVDS:
  • I/O supply voltages for LVCMOS:
  • Lead-free (RoHS 6) 48-lead VFQFN packaging
  • -55°C to 105°C ambient operating temperature

Product Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 48 I Yes Tray
Active VFQFPN 48 I Yes Reel

Documentation & Downloads

Title language Type Format File Size Date
Datasheets & Errata
8V44S269 Data Sheet Datasheet PDF 784 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 133 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products Application Note PDF 108 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB