The 843S06 is a low voltage, low skew 3.3V LVPECL Clock Synthesizer. The device targets clock distribution in SDH/SONET telecommunication systems but is well suited for a wide range of applications requiring high performance high-speed clock synthesis. The device implements a fully integrated multiplying PLL including:

Features

  • 6 differential 3.3V LVPECL outputs1,244.16 / 622.08MHz
  • 1,244.16 / 622.08MHz 622.08 / 311.04MHz
  • 311.04 / 155.52MHz 155.52 / 77.76MHz
  • 77.76/38.88MHz
  • Three selectable differential reference clock inputsClock frequency range: 19MHz to 622MHz
  • REF_CLKx, nREF_CLKx pairs can accept the followingdifferential input level: LVPECL
  • Intrinsic jitter: 0.017mUIRMS @ 622MHz
  • Output skew: 200ps (maximum)
  • Optional external VCXO possible
  • Simple external loop filter
  • Lock detect output signal
  • Full 3.3V operating supply
  • Low power operation 0.6W (typical)
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) packages

Product Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active PTQFP 48 C Yes Tray
Availability
Active PTQFP 48 C Yes Reel
Availability

Documentation

Title language Type Format File Size Date
Datasheets & Errata
843S06 Data Sheet Datasheet PDF 401 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-831 The Crystal Load curve Application Note PDF 395 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-832 Timing Budget and Accuracy Application Note PDF 131 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 143 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-801 Crystal-High Drive Level Application Note PDF 202 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
AN-803 Crystal Timing Budget and Accuracy for Renesas Timing Clock Products Application Note PDF 108 KB
PCNs & PDNs
PCN# : A1709-02 Add alternate assembly at OSET and Convert to Copper Wire Product Change Notice PDF 35 KB
PCN# : A0905-01R1 OBSOLETE 7 MM X 7 MM X 1.4 MM TQFP-48 (GREEN) Product Change Notice PDF 113 KB
PCN# : A0905-01 OBSOLETE 7 MM X 7 MM X 1.4 MM TQFP-48 (GREEN) Product Change Notice PDF 3.02 MB
Other
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB