The 5P83905 is a high-performance, 1-to-6 crystal input to LVCMOS fanout buffer with output enable pins. This device accepts a fundamental mode crystal from 10 MHz to 40 MHz and outputs LVCMOS clocks with best-in-class phase noise performance.

The 5P83905 features a synchronous glitch-free Output Enable function to eliminate any intermediate incorrect output clock cycles when enabling or disabling outputs. It comes in standard TSSOP packages or small QFN packages and can operate from 1.8 V to 3.3 V supplies.


  • Six copies of LVCMOS output clocks with best-in-class phase noise performance
  • Phase Noise:
    Offset Noise Power (3.3 V)
    •      100 Hz: -131 dBc/Hz
    •      1 KHz: -145 dBc/Hz
    •      10 KHz: -154 dBc/Hz
    •      100 KHz: -161 dBc/Hz
  • Operating power supply modes:
    •      Full 3.3 V, 2.5 V, 1.8 V
    •      Mixed 3.3 V core / 2.5 V output operating supply
    •      Mixed 3.3 V core / 1.8 V output operating supply
    •      Mixed 2.5 V core / 1.8 V output operating supply
  • Crystal Oscillator Interface
  • Synchronous Output Enable
  • Packaged in 16-pin TSSOP and QFN packages
  • Extended temperature range (-40°C to +105°C) 


Document title Document type
Date Date
PDF 459 KB Datasheet
PDF 146 KB Application Note
PDF 495 KB Application Note
PDF 442 KB Application Note
PDF 565 KB Application Note
PDF 217 KB Overview
PDF 252 KB Overview
PDF 1.83 MB Overview
PDF 268 KB Product Change Notice
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Design & Development



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ZIP 25 KB Model - IBIS
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5PB11xx Ultra Low Jitter LVCMOS Buffers by IDT