The ISL70001SRHEVAL1Z evaluation board is designed to demonstrate the features of the ISL70001SRH, a TID and SEE hardened 6A synchronous buck regulator IC with integrated MOSFETs intended for space applications.

The ISL70001SRHEVAL1Z evaluation board accepts a nominal 3V to 5.5V input voltage and provides a regulated output voltage ranging from 0.8V to 85% of the input voltage at output currents ranging from 0A to 6A. The output can be quickly set to any of six commonly used preset voltages (0.8V, 1.0V, 1.2V, 1.8V, 2.5V, 3.3V) or adjusted to an alternate voltage using the onboard potentiometer. A PGOOD (power-good) signal goes high and lights a red LED to indicate that the output voltage is within a ±11% typical regulation window. A toggle switch is provided to conveniently enable or disable the output voltage.

The ISL70001SRHEVAL1Z evaluation board can be set to run from the nominal 1MHz internal oscillator of the ISL70001SRH or synchronized to a 1MHz ±20% external clock. Two or more ISL70001SRHEVAL1Z evaluation boards can be synchronized to each other in a Master/Slave configuration, with all Slave units switching 180° out-of-phase with respect to the Master unit.


  • ±1% reference voltage over line, load, temperature, and radiation
  • Current mode control for excellent dynamic response
  • Full Mil-temp range operation (TA = -55 °C to +125 °C)
  • High efficiency >90%
  • Fixed 1MHz operating frequency
  • Available in a thermally enhanced heatsink package - R48.B
  • Operates from 3V to 5.5V supply
  • Adjustable output voltage: Two external resistors set VOUT from 0.8V to ~85% of VIN
  • Bidirectional SYNC pin allows two devices to be synchronized 180° out-of-phase
  • Starts into prebiased load
  • Power-Good output voltage monitor
  • Adjustable analog soft-start
  • Input undervoltage, output undervoltage and output overcurrent protection
  • Electrically screened to DLA SMD 5962-09225
  • QML qualified per MIL-PRF-38535 requirements
  • EH version is wafer-by-wafer acceptance tested for ELDRS


  • FPGA, CPLD, DSP, CPU core or I/O voltages
  • Low-voltage, high-density distributed power systems

Documentation & Downloads

Title Other Languages Type Format File Size Date
User Guides & Manuals
ISL70001SRHEVAL1Z User Guide Manual PDF 562 KB
ISL70001SRHEVAL1Z Gerber Files Design File ZIP 265 KB
ISL70001SRH Neutron Test Report Report PDF 437 KB
ISL70001SRH Total Dose Test Report Report PDF 255 KB
ISL70001SRH SEE Test Report Report PDF 1.71 MB