Overview

Description

The MK2308-2 is a low jitter, low skew, high performance Phase-Lock Loop (PLL) based zero delay buffer for high speed applications. Based on IDT's proprietary low jitter PLL techniques, the device provides eight low skew outputs at speeds up to 133.3 MHz at 3.3 V. The MK2308-2 includes a bank of four outputs running at 1/2X. In the zero delay mode, the rising edge of the input clock is aligned with the rising edges of all eight outputs. Compared to competitive CMOS devices, the MK2308-2 has the lowest jitter.

Features

  • Packaged in 16-pin SOIC
  • Pb (lead) free package
  • Zero input-output delay
  • Four 1X outputs plus four 1/2X outputs
  • Output to output skew is less than 250 ps
  • Output clocks up to 133.3 MHz at 3.3 V
  • Ability to generate 2X the input
  • Full CMOS outputs with 18 mA output drive capability at TTL levels at 3.3 V
  • Spread SmartTM technology works with spread spectrum clock generators
  • Advanced, low power, sub micron CMOS process
  • Operating voltage of 3.3 V

Comparison

Applications

Documentation

Design & Development

Models