Overview

Description

The M2040 is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock protection, frequency translation and jitter attenuation in fault tolerant computing applications. It features dual differential inputs with two modes of input selection: manual and automatic upon clock failure. The clock multiplication ratios and output divider ratio are pin selectable. External loop components allow the tailoring of PLL loop response.

Features

  • Integrated SAW (surface acoustic wave) delay line
  • VCSO frequency of 500.00 to 533.3334 MHz
  • * outputs VCSO frequency or half
  • Pin-configurable dividers
  • Loss of Lock (LOL) indicator output
  • Narrow Bandwidth control input (NBW Pin)
  • Initialization (INIT) input overrides NBW at power-up
  • Dual reference clock inputs support LVDS, LVPECL, LVCMOS, LVTTL
  • Automatic (non-revertive) reference clock reselection upon clock failure
  • controlled PLL slew rate ensures normal system operation during reference reselection
  • Acknowledge pin indicates the actively selected reference input
  • Dual differential LVPECL outputs
  • Low phase jitter of
  • Industrial temperature available
  • Single 3.3V power supply
  • Small 9 x 9 mm SMT (surface mount) package

Comparison

Applications

Documentation

Type Title Date
Product Change Notice PDF 361 KB
End Of Life Notice PDF 71 KB
2 items

Design & Development

Models