-- generated by newgenasym Fri Aug 04 18:02:25 2006

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity BEAD_SM is
    port (    
	A:         INOUT  STD_LOGIC;    
	B:         INOUT  STD_LOGIC);
end BEAD_SM;
