-- generated by newgenasym Fri Oct 13 17:21:53 2006

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity osc_5x7mm is
    port (    
	GND:       IN     STD_LOGIC;    
	OE:        IN     STD_LOGIC;    
	\out\:     OUT    STD_LOGIC;    
	VCC:       IN     STD_LOGIC);
end osc_5x7mm;
