// generated by newgenasym  Thu Feb 15 09:39:35 2007


module \89hpes16t7bxg  (cclkds, cclkus, gpio_00, gpio_01, gpio_02, gpio_03,
        gpio_04, gpio_05, gpio_06, gpio_07, gpio_08, gpio_09,
        gpio_10, gpio_11, jtag_tck, jtag_tdi, jtag_tdo, jtag_tms,
        \jtag_trst* , msmbaddr_1, msmbaddr_2, msmbaddr_3,
        msmbaddr_4, msmbclk, msmbdat, msmbsmode, p01mergen,
        pe0rn00, pe0rn01, pe0rn02, pe0rn03, pe0rp00, pe0rp01,
        pe0rp02, pe0rp03, pe0tn00, pe0tn01, pe0tn02, pe0tn03,
        pe0tp00, pe0tp01, pe0tp02, pe0tp03, pe1rn00, pe1rn01,
        pe1rn02, pe1rn03, pe1rp00, pe1rp01, pe1rp02, pe1rp03,
        pe1tn00, pe1tn01, pe1tn02, pe1tn03, pe1tp00, pe1tp01,
        pe1tp02, pe1tp03, pe2rn00, pe2rp00, pe2tn00, pe2tp00,
        pe3rn00, pe3rp00, pe3tn00, pe3tp00, pe4rn00, pe4rp00,
        pe4tn00, pe4tp00, pe5rn00, pe5rp00, pe5tn00, pe5tp00,
        pe6rn00, pe6rn01, pe6rn02, pe6rn03, pe6rp00, pe6rp01,
        pe6rp02, pe6rp03, pe6tn00, pe6tn01, pe6tn02, pe6tn03,
        pe6tp00, pe6tp01, pe6tp02, pe6tp03, perefclkn1, perefclkn2,
        perefclkp1, perefclkp2, perstn, refclkm, rsthalt,
        ssmbaddr_1, ssmbaddr_2, ssmbaddr_3, ssmbaddr_5, ssmbclk,
        ssmbdat, swmode_0, swmode_1, swmode_2, vddape1, vddape10,
        vddape11, vddape12, vddape13, vddape14, vddape15, vddape16,
        vddape17, vddape18, vddape19, vddape2, vddape20, vddape21,
        vddape22, vddape23, vddape24, vddape25, vddape26, vddape27,
        vddape28, vddape29, vddape3, vddape30, vddape4, vddape5,
        vddape6, vddape7, vddape8, vddape9, vddcore1, vddcore10,
        vddcore11, vddcore12, vddcore13, vddcore14, vddcore15,
        vddcore16, vddcore17, vddcore18, vddcore19, vddcore2,
        vddcore20, vddcore21, vddcore22, vddcore23, vddcore24,
        vddcore25, vddcore26, vddcore27, vddcore28, vddcore29,
        vddcore3, vddcore30, vddcore31, vddcore32, vddcore33,
        vddcore34, vddcore35, vddcore36, vddcore4, vddcore5,
        vddcore6, vddcore7, vddcore8, vddcore9, vddio1, vddio10,
        vddio11, vddio12, vddio2, vddio3, vddio4, vddio5, vddio6,
        vddio7, vddio8, vddio9, vddpe1, vddpe10, vddpe11, vddpe12,
        vddpe13, vddpe14, vddpe15, vddpe16, vddpe17, vddpe18,
        vddpe19, vddpe2, vddpe20, vddpe21, vddpe22, vddpe23,
        vddpe24, vddpe25, vddpe26, vddpe27, vddpe28, vddpe29,
        vddpe3, vddpe30, vddpe4, vddpe5, vddpe6, vddpe7, vddpe8,
        vddpe9, vss1, vss10, vss11, vss12, vss13, vss14, vss15, vss16,
        vss17, vss18, vss19, vss2, vss20, vss21, vss22, vss23, vss24,
        vss25, vss26, vss27, vss28, vss29, vss3, vss30, vss31, vss32,
        vss33, vss34, vss35, vss36, vss37, vss38, vss39, vss4, vss40,
        vss41, vss42, vss43, vss44, vss45, vss46, vss47, vss48, vss49,
        vss5, vss50, vss51, vss52, vss53, vss54, vss55, vss56, vss57,
        vss58, vss59, vss6, vss60, vss61, vss62, vss63, vss64, vss65,
        vss66, vss67, vss68, vss69, vss7, vss70, vss71, vss72, vss73,
        vss74, vss75, vss76, vss77, vss78, vss79, vss8, vss80, vss81,
        vss82, vss83, vss84, vss85, vss86, vss87, vss88, vss89, vss9,
        vss90, vss91, vss92, vss93, vss94, vtt1, vtt10, vtt11, vtt2,
        vtt3, vtt4, vtt5, vtt6, vtt7, vtt8, vtt9);
    input cclkds;
    input cclkus;
    input gpio_00;
    input gpio_01;
    input gpio_02;
    input gpio_03;
    input gpio_04;
    input gpio_05;
    input gpio_06;
    input gpio_07;
    input gpio_08;
    input gpio_09;
    input gpio_10;
    input gpio_11;
    input jtag_tck;
    input jtag_tdi;
    output jtag_tdo;
    input jtag_tms;
    input \jtag_trst* ;
    input msmbaddr_1;
    input msmbaddr_2;
    input msmbaddr_3;
    input msmbaddr_4;
    input msmbclk;
    input msmbdat;
    input msmbsmode;
    input p01mergen;
    input pe0rn00;
    input pe0rn01;
    input pe0rn02;
    input pe0rn03;
    input pe0rp00;
    input pe0rp01;
    input pe0rp02;
    input pe0rp03;
    output pe0tn00;
    output pe0tn01;
    output pe0tn02;
    output pe0tn03;
    output pe0tp00;
    output pe0tp01;
    output pe0tp02;
    output pe0tp03;
    input pe1rn00;
    input pe1rn01;
    input pe1rn02;
    input pe1rn03;
    input pe1rp00;
    input pe1rp01;
    input pe1rp02;
    input pe1rp03;
    output pe1tn00;
    output pe1tn01;
    output pe1tn02;
    output pe1tn03;
    output pe1tp00;
    output pe1tp01;
    output pe1tp02;
    output pe1tp03;
    input pe2rn00;
    input pe2rp00;
    output pe2tn00;
    output pe2tp00;
    input pe3rn00;
    input pe3rp00;
    output pe3tn00;
    output pe3tp00;
    input pe4rn00;
    input pe4rp00;
    output pe4tn00;
    output pe4tp00;
    input pe5rn00;
    input pe5rp00;
    output pe5tn00;
    output pe5tp00;
    input pe6rn00;
    input pe6rn01;
    input pe6rn02;
    input pe6rn03;
    input pe6rp00;
    input pe6rp01;
    input pe6rp02;
    input pe6rp03;
    output pe6tn00;
    output pe6tn01;
    output pe6tn02;
    output pe6tn03;
    output pe6tp00;
    output pe6tp01;
    output pe6tp02;
    output pe6tp03;
    input perefclkn1;
    input perefclkn2;
    input perefclkp1;
    input perefclkp2;
    input perstn;
    input refclkm;
    input rsthalt;
    input ssmbaddr_1;
    input ssmbaddr_2;
    input ssmbaddr_3;
    input ssmbaddr_5;
    input ssmbclk;
    input ssmbdat;
    input swmode_0;
    input swmode_1;
    input swmode_2;
    input vddape1;
    input vddape10;
    input vddape11;
    input vddape12;
    input vddape13;
    input vddape14;
    input vddape15;
    input vddape16;
    input vddape17;
    input vddape18;
    input vddape19;
    input vddape2;
    input vddape20;
    input vddape21;
    input vddape22;
    input vddape23;
    input vddape24;
    input vddape25;
    input vddape26;
    input vddape27;
    input vddape28;
    input vddape29;
    input vddape3;
    input vddape30;
    input vddape4;
    input vddape5;
    input vddape6;
    input vddape7;
    input vddape8;
    input vddape9;
    input vddcore1;
    input vddcore10;
    input vddcore11;
    input vddcore12;
    input vddcore13;
    input vddcore14;
    input vddcore15;
    input vddcore16;
    input vddcore17;
    input vddcore18;
    input vddcore19;
    input vddcore2;
    input vddcore20;
    input vddcore21;
    input vddcore22;
    input vddcore23;
    input vddcore24;
    input vddcore25;
    input vddcore26;
    input vddcore27;
    input vddcore28;
    input vddcore29;
    input vddcore3;
    input vddcore30;
    input vddcore31;
    input vddcore32;
    input vddcore33;
    input vddcore34;
    input vddcore35;
    input vddcore36;
    input vddcore4;
    input vddcore5;
    input vddcore6;
    input vddcore7;
    input vddcore8;
    input vddcore9;
    input vddio1;
    input vddio10;
    input vddio11;
    input vddio12;
    input vddio2;
    input vddio3;
    input vddio4;
    input vddio5;
    input vddio6;
    input vddio7;
    input vddio8;
    input vddio9;
    input vddpe1;
    input vddpe10;
    input vddpe11;
    input vddpe12;
    input vddpe13;
    input vddpe14;
    input vddpe15;
    input vddpe16;
    input vddpe17;
    input vddpe18;
    input vddpe19;
    input vddpe2;
    input vddpe20;
    input vddpe21;
    input vddpe22;
    input vddpe23;
    input vddpe24;
    input vddpe25;
    input vddpe26;
    input vddpe27;
    input vddpe28;
    input vddpe29;
    input vddpe3;
    input vddpe30;
    input vddpe4;
    input vddpe5;
    input vddpe6;
    input vddpe7;
    input vddpe8;
    input vddpe9;
    input vss1;
    input vss10;
    input vss11;
    input vss12;
    input vss13;
    input vss14;
    input vss15;
    input vss16;
    input vss17;
    input vss18;
    input vss19;
    input vss2;
    input vss20;
    input vss21;
    input vss22;
    input vss23;
    input vss24;
    input vss25;
    input vss26;
    input vss27;
    input vss28;
    input vss29;
    input vss3;
    input vss30;
    input vss31;
    input vss32;
    input vss33;
    input vss34;
    input vss35;
    input vss36;
    input vss37;
    input vss38;
    input vss39;
    input vss4;
    input vss40;
    input vss41;
    input vss42;
    input vss43;
    input vss44;
    input vss45;
    input vss46;
    input vss47;
    input vss48;
    input vss49;
    input vss5;
    input vss50;
    input vss51;
    input vss52;
    input vss53;
    input vss54;
    input vss55;
    input vss56;
    input vss57;
    input vss58;
    input vss59;
    input vss6;
    input vss60;
    input vss61;
    input vss62;
    input vss63;
    input vss64;
    input vss65;
    input vss66;
    input vss67;
    input vss68;
    input vss69;
    input vss7;
    input vss70;
    input vss71;
    input vss72;
    input vss73;
    input vss74;
    input vss75;
    input vss76;
    input vss77;
    input vss78;
    input vss79;
    input vss8;
    input vss80;
    input vss81;
    input vss82;
    input vss83;
    input vss84;
    input vss85;
    input vss86;
    input vss87;
    input vss88;
    input vss89;
    input vss9;
    input vss90;
    input vss91;
    input vss92;
    input vss93;
    input vss94;
    input vtt1;
    input vtt10;
    input vtt11;
    input vtt2;
    input vtt3;
    input vtt4;
    input vtt5;
    input vtt6;
    input vtt7;
    input vtt8;
    input vtt9;


    initial
        begin
        end

endmodule
