-- generated by newgenasym Wed Jan 31 11:10:01 2007

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity pciecon_x16_ra is
    port (    
	A1:        INOUT  STD_LOGIC;    
	A10:       INOUT  STD_LOGIC;    
	A11:       INOUT  STD_LOGIC;    
	A12:       INOUT  STD_LOGIC;    
	A13:       INOUT  STD_LOGIC;    
	A14:       INOUT  STD_LOGIC;    
	A15:       INOUT  STD_LOGIC;    
	A16:       INOUT  STD_LOGIC;    
	A17:       INOUT  STD_LOGIC;    
	A18:       INOUT  STD_LOGIC;    
	A19:       INOUT  STD_LOGIC;    
	A2:        INOUT  STD_LOGIC;    
	A20:       INOUT  STD_LOGIC;    
	A21:       INOUT  STD_LOGIC;    
	A22:       INOUT  STD_LOGIC;    
	A23:       INOUT  STD_LOGIC;    
	A24:       INOUT  STD_LOGIC;    
	A25:       INOUT  STD_LOGIC;    
	A26:       INOUT  STD_LOGIC;    
	A27:       INOUT  STD_LOGIC;    
	A28:       INOUT  STD_LOGIC;    
	A29:       INOUT  STD_LOGIC;    
	A3:        INOUT  STD_LOGIC;    
	A30:       INOUT  STD_LOGIC;    
	A31:       INOUT  STD_LOGIC;    
	A32:       INOUT  STD_LOGIC;    
	A33:       INOUT  STD_LOGIC;    
	A34:       INOUT  STD_LOGIC;    
	A35:       INOUT  STD_LOGIC;    
	A36:       INOUT  STD_LOGIC;    
	A37:       INOUT  STD_LOGIC;    
	A38:       INOUT  STD_LOGIC;    
	A39:       INOUT  STD_LOGIC;    
	A4:        INOUT  STD_LOGIC;    
	A40:       INOUT  STD_LOGIC;    
	A41:       INOUT  STD_LOGIC;    
	A42:       INOUT  STD_LOGIC;    
	A43:       INOUT  STD_LOGIC;    
	A44:       INOUT  STD_LOGIC;    
	A45:       INOUT  STD_LOGIC;    
	A46:       INOUT  STD_LOGIC;    
	A47:       INOUT  STD_LOGIC;    
	A48:       INOUT  STD_LOGIC;    
	A49:       INOUT  STD_LOGIC;    
	A5:        INOUT  STD_LOGIC;    
	A50:       INOUT  STD_LOGIC;    
	A51:       INOUT  STD_LOGIC;    
	A52:       INOUT  STD_LOGIC;    
	A53:       INOUT  STD_LOGIC;    
	A54:       INOUT  STD_LOGIC;    
	A55:       INOUT  STD_LOGIC;    
	A56:       INOUT  STD_LOGIC;    
	A57:       INOUT  STD_LOGIC;    
	A58:       INOUT  STD_LOGIC;    
	A59:       INOUT  STD_LOGIC;    
	A6:        INOUT  STD_LOGIC;    
	A60:       INOUT  STD_LOGIC;    
	A61:       INOUT  STD_LOGIC;    
	A62:       INOUT  STD_LOGIC;    
	A63:       INOUT  STD_LOGIC;    
	A64:       INOUT  STD_LOGIC;    
	A65:       INOUT  STD_LOGIC;    
	A66:       INOUT  STD_LOGIC;    
	A67:       INOUT  STD_LOGIC;    
	A68:       INOUT  STD_LOGIC;    
	A69:       INOUT  STD_LOGIC;    
	A7:        INOUT  STD_LOGIC;    
	A70:       INOUT  STD_LOGIC;    
	A71:       INOUT  STD_LOGIC;    
	A72:       INOUT  STD_LOGIC;    
	A73:       INOUT  STD_LOGIC;    
	A74:       INOUT  STD_LOGIC;    
	A75:       INOUT  STD_LOGIC;    
	A76:       INOUT  STD_LOGIC;    
	A77:       INOUT  STD_LOGIC;    
	A78:       INOUT  STD_LOGIC;    
	A79:       INOUT  STD_LOGIC;    
	A8:        INOUT  STD_LOGIC;    
	A80:       INOUT  STD_LOGIC;    
	A81:       INOUT  STD_LOGIC;    
	A82:       INOUT  STD_LOGIC;    
	A9:        INOUT  STD_LOGIC;    
	B1:        INOUT  STD_LOGIC;    
	B10:       INOUT  STD_LOGIC;    
	B11:       INOUT  STD_LOGIC;    
	B12:       INOUT  STD_LOGIC;    
	B13:       INOUT  STD_LOGIC;    
	B14:       INOUT  STD_LOGIC;    
	B15:       INOUT  STD_LOGIC;    
	B16:       INOUT  STD_LOGIC;    
	B17:       INOUT  STD_LOGIC;    
	B18:       INOUT  STD_LOGIC;    
	B19:       INOUT  STD_LOGIC;    
	B2:        INOUT  STD_LOGIC;    
	B20:       INOUT  STD_LOGIC;    
	B21:       INOUT  STD_LOGIC;    
	B22:       INOUT  STD_LOGIC;    
	B23:       INOUT  STD_LOGIC;    
	B24:       INOUT  STD_LOGIC;    
	B25:       INOUT  STD_LOGIC;    
	B26:       INOUT  STD_LOGIC;    
	B27:       INOUT  STD_LOGIC;    
	B28:       INOUT  STD_LOGIC;    
	B29:       INOUT  STD_LOGIC;    
	B3:        INOUT  STD_LOGIC;    
	B30:       INOUT  STD_LOGIC;    
	B31:       INOUT  STD_LOGIC;    
	B32:       INOUT  STD_LOGIC;    
	B33:       INOUT  STD_LOGIC;    
	B34:       INOUT  STD_LOGIC;    
	B35:       INOUT  STD_LOGIC;    
	B36:       INOUT  STD_LOGIC;    
	B37:       INOUT  STD_LOGIC;    
	B38:       INOUT  STD_LOGIC;    
	B39:       INOUT  STD_LOGIC;    
	B4:        INOUT  STD_LOGIC;    
	B40:       INOUT  STD_LOGIC;    
	B41:       INOUT  STD_LOGIC;    
	B42:       INOUT  STD_LOGIC;    
	B43:       INOUT  STD_LOGIC;    
	B44:       INOUT  STD_LOGIC;    
	B45:       INOUT  STD_LOGIC;    
	B46:       INOUT  STD_LOGIC;    
	B47:       INOUT  STD_LOGIC;    
	B48:       INOUT  STD_LOGIC;    
	B49:       INOUT  STD_LOGIC;    
	B5:        INOUT  STD_LOGIC;    
	B50:       INOUT  STD_LOGIC;    
	B51:       INOUT  STD_LOGIC;    
	B52:       INOUT  STD_LOGIC;    
	B53:       INOUT  STD_LOGIC;    
	B54:       INOUT  STD_LOGIC;    
	B55:       INOUT  STD_LOGIC;    
	B56:       INOUT  STD_LOGIC;    
	B57:       INOUT  STD_LOGIC;    
	B58:       INOUT  STD_LOGIC;    
	B59:       INOUT  STD_LOGIC;    
	B6:        INOUT  STD_LOGIC;    
	B60:       INOUT  STD_LOGIC;    
	B61:       INOUT  STD_LOGIC;    
	B62:       INOUT  STD_LOGIC;    
	B63:       INOUT  STD_LOGIC;    
	B64:       INOUT  STD_LOGIC;    
	B65:       INOUT  STD_LOGIC;    
	B66:       INOUT  STD_LOGIC;    
	B67:       INOUT  STD_LOGIC;    
	B68:       INOUT  STD_LOGIC;    
	B69:       INOUT  STD_LOGIC;    
	B7:        INOUT  STD_LOGIC;    
	B70:       INOUT  STD_LOGIC;    
	B71:       INOUT  STD_LOGIC;    
	B72:       INOUT  STD_LOGIC;    
	B73:       INOUT  STD_LOGIC;    
	B74:       INOUT  STD_LOGIC;    
	B75:       INOUT  STD_LOGIC;    
	B76:       INOUT  STD_LOGIC;    
	B77:       INOUT  STD_LOGIC;    
	B78:       INOUT  STD_LOGIC;    
	B79:       INOUT  STD_LOGIC;    
	B8:        INOUT  STD_LOGIC;    
	B80:       INOUT  STD_LOGIC;    
	B81:       INOUT  STD_LOGIC;    
	B82:       INOUT  STD_LOGIC;    
	B9:        INOUT  STD_LOGIC);
end pciecon_x16_ra;
