-- generated by newgenasym Fri Apr 21 17:28:20 2006

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity molex_15_24_4441 is
    port (    
	\1\:       INOUT  STD_LOGIC;    
	\2\:       INOUT  STD_LOGIC;    
	\3\:       INOUT  STD_LOGIC;    
	\4\:       INOUT  STD_LOGIC);
end molex_15_24_4441;
