60V, 1A/2A Peak, Half Bridge Driver with 4V UVLO and Two Internal LDO’s 12V and 3.3V

Product Status: Mass Production


The HIP2103 and HIP2104 are half bridge drivers designed for applications using DC motors, three-phase brushless DC motors, or other similar loads.

Two inputs (HI and LI) are provided to independently control the high side driver (HO) and the low side driver (LO). Furthermore, the two inputs can be configured to enable/disable the device, thus lowering the number of connections to a microcontroller and lowering costs.

The very low IDD bias current in the Sleep Mode prevents battery drain when the device is not in use, thus eliminating the need for an external switch to disconnect the driver from the battery.

A fail-safe mechanism is included to improve system reliability and to minimize the possibility of catastrophic bridge failures due to controller malfunction. Internal logic prevents both outputs from turning on simultaneously when HI and LI are both high simultaneously. Dead-time is still required on the rising edge of the HI (or LI) input when the LI (or HI) input transitions low.

Integrated pull-down resistors on all of the inputs (LI, HI, VDen and VCen) reduces the need for external resistors. An active low resistance pull-down on the LO output ensures that the low side bridge FET remains off during the Sleep Mode or when VDD is below the undervoltage lockout (UVLO) threshold.

The HIP2104 has a 12V linear regulator and a 3.3V linear regulator with separate enable pins. The 12V regulator provides internal bias for VDD and the 3.3V regulator provides bias for an external microcontroller (and/or other low voltage ICs), thus eliminating the need for discrete LDOs or DC/DC converters.

The HIP2103 is available in a 3x3mm, 8 Ld TDFN package and the HIP2104 is available in a 4x4mm, 12 Ld DFN package.


  • 60V maximum bootstrap supply voltage
  • 3.3V and 12V LDOs with dedicated enable pins
  • 5µA sleep mode quiescent current
  • 4V undervoltage lockout
  • 3.3V or 5V CMOS compatible inputs with hysteresis
  • Integrated bootstrap FET (replaces traditional boot strap diode)


Basic Information
Production Status
Mass Production
Max Bootstrap Supply Voltage (V)
VBIAS (max) (V)
Peak Pull-up Current
1 A
Peak Pull-down Current
2 A
Turn-On Prop Delay (ns)
Turn-Off Prop Delay (ns)
Rise Time
21 ns
Fall Time
17 ns
Input Logic Level
Charge Pump
Qualification Level
Can Sample
Temperature Range
-40 to +125

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