概要

説明

The 8S89296 is a high-performance LVDS programmable delay line. The delay can vary from 2.2ns to 12.5ns in 10ps steps. The 8S89296 is characterized to operate from a 2.5V power supply and is guaranteed over industrial temperature range. The delay of the device varies in discrete steps based on a control word. A 10-bit long control word sets the delay in 10ps increments. Also, the input pins IN and nIN default to an equivalent low state when left floating. The control register can accept CMOS or TTL level signals.

特長

  • One LVDS level output
  • One differential clock input pair
  • Differential input clock (IN, nIN) can accept the following signaling levels: LVPECL, LVDS, CML
  • Maximum frequency: 800MHz
  • Programmable delay range: 2.2ns to 12.5ns in 10ps steps
  • D[10:0] can accept LVPECL, LVCMOS or LVTTL levels
  • Full 2.5V supply voltages
  • -40°C to +85°C ambient operating temperature
  • Lead-free (RoHS 6) package

製品比較

アプリケーション

ドキュメント

分類 タイトル 日付
データシート PDF 475 KB
製品変更通知 PDF 728 KB
製品変更通知 PDF 983 KB
3 items

設計・開発

モデル