The 854S54I-01 is a 2:1/1:2 Multiplexer. The 2:1 Multiplexer allows one of two inputs to be selected onto one output pin and the 1:2 MUX switches one input to both outputs. This device may be useful for multiplexing multi-rate Ethernet PHYs which have 100Mbit and 1000Mbit transmit/receive pairs onto an optical SFP module which has a single transmit/receive pair. Another mode allows loop back testing and allows the output of a PHY transmit pair to be routed to the PHY input pair. For examples, please refer to the Application Information section of the data sheet. The 854S54I-01 is optimized for applications requiring very high performance and has a maximum operating frequency of 2.5GHz. The device is packaged in a small, 3mm x 3mm VFQFN package, making it ideal for use on space-constrained boards.

Features

  • Dual 2:1, 1:2 MUX
  • Three LVDS output pairs
  • Three differential clock inputs can accept: LVPECL, LVDS, CML
  • Loopback test mode available
  • Maximum output frequency: 2.5GHz
  • Propagation delay: 600ps (maximum)
  • Part-to-part skew: 300ps (maximum)
  • Additive phase jitter, RMS: 0.031ps (typical)
  • Full 2.5V supply mode
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

Part Number Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
854S54AKI-01LF
Not Recommended for New Designs VFQFPN 16 I Yes Tray
Availability
854S54AKI-01LFT
Not Recommended for New Designs VFQFPN 16 I Yes Reel
Availability

Documentation & Downloads

Title language Type Format File Size Date
Datasheets & Errata
ICS854S54I-01 Datasheet Datasheet PDF 311 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-846 Termination - LVDS Application Note PDF 133 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCNs & PDNs
PCN# : PCN200016 Change Shipping Media on Select Package Product Change Notice PDF 2.97 MB
PCN# : TB1912-02(R1) Convert Shipping Media
from Tube or Tray to Cut Reel
Product Change Notice PDF 5.71 MB
PCN# : TB1912-02 Convert Shipping Media
from Tube or Tray to Cut Reel
Product Change Notice PDF 5.61 MB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB
Other
Clock Distribution Overview 日本語 Overview PDF 217 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB