The 82V3398 is an integrated, single-chip solution for the Synchronous Equipment Timing Source for Stratum 3, 4E, 4, SMC, EECOption1, EEC-Option2 clocks in SONET / SDH / Synchronous Ethernet equipment, DWDM and Wireless base station. The device consists of a high quality and configurable DPLL to provide system clock for node timing synchronization within a SONET /SDH / Synchronous Ethernet network.


  • Integrated single-chip solution for Synchronous Equipment Timing Source, including Stratum 3, 4E, 4, SMC, EEC-Option 1 and EEC-Option 2 Clocks
  • Hitless reference switching to minimize DPLL output phase transients
  • Programmable input-to-output phase offset adjustment
  • Provides 6 output clocks from 1 Hz (1PPS) to 644.53125 MHz
  • Provides 6 input clocks from 1 Hz (1PPS) to 625 MHz
  • Internal DCO controlled by an external processor for IEEE-1588 clock generation
  • Free- Run, Locked and Holdover modes
  • Automatic hitless selected input clock switch on clock failure
  • 2 kHz, 4 kHz, 8 kHz, or 1PPS frame sync input, 2 kHz, 8 kHz, or 1PPS frame sync output 
  • Output clocks for BITS, GPS, 3G, GSM, etc.
  • PECL/LVDS and CMOS input/output technologies
  • Master/Slave feature for system protection against single chip failure

Product Options

Part Number Part Status Pkg. Type Lead Count (#) Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 72 Yes Tray
Active VFQFPN 72 Yes Reel


Title language Type Format File Size Date
Datasheets & Errata
82V3398 Datasheet Datasheet PDF 1.10 MB
82V3398 Shortform Datasheet Short Form Datasheet PDF 125 KB
Application Notes & White Papers
AN-807 Recommended Crystal Oscillators for Network Synchronization Application Note PDF 148 KB
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-845 Termination - LVCMOS Application Note PDF 146 KB
AN-846 Termination - LVDS Application Note PDF 133 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 115 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
AN-806 Power Supply Noise Rejection Application Note PDF 438 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : A1311-03R1 Alternate Assembly Locations Product Change Notice PDF 43 KB
PCN# : A1311-03 Alternate Assembly Locations Product Change Notice PDF 140 KB
PCN# : A1308-01 Add ASEK as Alternate Assembly for VFQFPN-72 Product Change Notice PDF 103 KB