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Search has returned 34 results
Title Type Format File Size Language Date
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with Universal Low-Power HCSL Outputs Application Note PDF 431 KB English
Package Outline Drawing Package Code: NLG64P7 64-VFQFPN 9.0 x 9.0 x 0.9 mm Body, 0.50mm Pitch Package Outline Drawing PDF 198 KB English
AN-805 Recommended Ferrite Beads Application Note PDF 91 KB English
Package Outline Drawing Package Code: NLG64P6 64-VFQFPN 9.0 x 9.0 x 0.9 mm Body, 0.50mm Pitch Package Outline Drawing PDF 197 KB English
Package Outline Drawing Package Code: NLG64P8 64-VFQFPN 9.0 x 9.0 x 0.9 mm Body, 0.50mm Pitch Package Outline Drawing PDF 197 KB English
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.99 MB English
NLG64 Package Outline Drawing 9.0 x 9.0 X 0.9 mm. Body 0.50mm. Pitch VFQFPN Package Outline Drawing PDF 428 KB English
Clock Distribution Overview Overview PDF 217 KB English
PCN# : TP1910-03-R1 Update the Cut-off Date Code Product Change Notice PDF 163 KB English
PCN# : TP1910-03 Top Metal Change Product Change Notice PDF 158 KB English
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB English
Green Products RoHS Material Declaration Certificate Certificate PDF 170 KB English
9ZXL1530D IBIS Model Model - IBIS ZIP 14 KB English
AN-1001 Combining PhiClock and 9ZXL1951D for PCIe Gen4/5 Application Note PDF 244 KB English
Package Outline Drawing Package Code: NLG64P1 64-VFQFPN 9.0 x 9.0 x 0.9 mm Body, 0.50mm Pitch Package Outline Drawing PDF 197 KB English
Package Outline Drawing Package Code: NLG64P2 64-VFQFPN 9.0 x 9.0 x 0.9 mm Body, 0.50mm Pitch Package Outline Drawing PDF 197 KB English
Package Outline Drawing Package Code: NLG64P3 64-VFQFPN 9.0 x 9.0 x 0.9 mm Body, 0.50mm Pitch Package Outline Drawing PDF 197 KB English
Package Outline Drawing Package Code: NLG64P4 64-VFQFPN 9.0 x 9.0 x 0.9 mm Body, 0.50mm Pitch Package Outline Drawing PDF 197 KB English
64-VFQFPN, Package Outline Drawing9.0 x 9.0 x 0.85 mm Body, 0.5mm Pitch, Epad 6.00 x 6.00 mmNLG64D3 Punch Package Outline Drawing PDF 178 KB English
Package Outline Drawing Package Code: NLG64S1 64-VFQFPN 9.0 x 9.0 x 0.9 mm Body, 0.50mm Pitch Package Outline Drawing PDF 198 KB English
64-VFQFPN, Package Outline Drawing9.0 x 9.0 x 0.85 mm Body, 0.5mm Pitch, Epad 7.15 x 7.15 mmNLG64D1 Punch Package Outline Drawing PDF 185 KB English
64-VFQFPN, Package Outline Drawing9.0 x 9.0 x 0.85 mm Body, 0.5mm Pitch, Epad 6.15 x 6.15 mmNLG64D2 Punch Package Outline Drawing PDF 190 KB English
Package Outline Drawing Package Code: NLG64P5 64-VFQFPN 9.0 x 9.0 x 0.9 mm Body, 0.50mm Pitch Package Outline Drawing PDF 200 KB English
AN-975 Cascading PLLs Application Note PDF 255 KB English
AN-828 Termination - LVPECL Application Note PDF 322 KB English
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 235 KB English
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB English
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB English
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB English
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB English
AN-815 Understanding Jitter Units Application Note PDF 565 KB English
AN-808 PCI Express/HCSL Termination Application Note PDF 137 KB English
PDN# : K-10-14R1 PRODUCT DISCONTINUANCE NOTICE ON SELECTIVE PC CLOCK PRODUCTS End Of Life Notice PDF 47 KB English
PCN A0802-01 (R1): Material Change Product Change Notice PDF 69 KB English