Documentation & Downloads Search
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| Title | Type | Format | File Size | Language | Date | |
|---|---|---|---|---|---|---|
| Termination Options for High-Speed LVCMOS Driver Clock Drivers | Application Note | 187 KB | English | |||
| Package Outline Drawing Package Code: NTG10P1 10-VFQFPN 2.0 x 2.0 x 0.75 mm Body, 0.4mm Pitch | Package Outline Drawing | 192 KB | English | |||
| 5PB12xx Datasheet | Datasheet | 292 KB | English | |||
| 5PB121x IBIS Model | Model - IBIS | ZIP | 17 KB | English | ||
| Clock Distribution Overview | Overview | 217 KB | English | |||
| PCN# : A1908-03 Adding Carsem Malaysia as Alternate Assembly Facility | Product Change Notice | 129 KB | English | |||
| IDT Ultra-Low-Jitter Single-Ended Buffer Family Overview | Overview | 252 KB | English | |||
| NTG10 PACKAGE OUTLINE 2.0 x 2.0 mm BODY 0.75 mm THICK | Package Outline Drawing | 54 KB | English | |||
| AN-842 Thermal Considerations in Package Design and Selection | Application Note | 495 KB | English | |||
| AN-840 Jitter Specifications for Timing Signals | Application Note | 442 KB | English | |||
| AN-815 Understanding Jitter Units | Application Note | 565 KB | English |