The 8T79S308 is a fully integrated signal fanout buffer for high-performance, low additive phase noise applications. The main function of the device is the distribution and fanout of high-frequency clocks or low-frequency synchronization signals. The 8T79S308 is optimized to deliver very low phase noise clocks and precise, low-skew outputs, low device-to-device skew characteristics and fast output rise/fall times help the system design to achieve deterministic clock phase relationship across devices.

The device distributes the input signals (IN_0, IN_1) to two fanout banks. A input select logic allows the device to operate as 1:8 buffer, dual 1:4 buffers, and to cross the input signals. The propagation delay in both outputs banks is designed for equal delay to support fixed phase relationships between both banks. All outputs are very flexible in LVPECL/LVDS output style configuration, output signal termination, and allow both DC and AC coupling. Outputs can be individually disabled through a serial interface.

The device is packaged in a lead-free (RoHS 6) 40-VFQFPN package. The extended temperature range supports wireless infrastructure, telecommunication, and networking end equipment requirements. The 8T79S308 is a member of the high-performance clock family from IDT.

特性

  • High-performance, flexible clock/data/1PPS fanout buffer
  • Low phase noise floor: -160dBc/Hz (156.56MHz clock)
  • Integrated phase noise of 50fs RMS typical (12kHz–20MHz)
  • Flexible input selection (single fanout, dual buffer, switch)
  • Eight differential outputs, organized in two banks of four outputs
  • Low-power LVPECL/LVDS outputs
  • Individually configured outputs through an I2C interface (style, amplitude, enable)
  • Supported clock frequency range: 0 to 3GHz
  • 3.3V/2.5V core and 3.3V/2.5V/1.8V output supply voltage
  • Selectable I2C I/O interface voltage: 1.8V and VDD
  • Integrated low dropout regulators (LDOs) for excellent power supply noise rejection
  • Package: 6 × 6 mm 40-VFQFPN
  • Temperature range: -40°C to +105°C

description文档

文档标题 language 类型 文档格式 文件大小 日期
数据手册与勘误表
star 8T79S308 Datasheet 数据手册 PDF 669 KB
应用指南 & 白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-846 Termination - LVDS 应用文档 PDF 133 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
其他
Clock Distribution Overview 概览 PDF 217 KB
IDT Clock Generation Overview 概览 PDF 1.83 MB
IDT Fanout Buffers Product Overview 产品简述 PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief 产品简述 PDF 378 KB

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