The 854S006I is a low skew, high performance 1-to-6 Differential-to-LVDS Fanout Buffer. The CLK, nCLK pair can accept most standard differential input levels. The 854S006I is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output skew characteristics make the 854S006I ideal for those clock distribution applications demanding well defined performance and repeatability.

特性

  • Six differential LVDS outputs
  • One differential clock input pair
  • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
  • Maximum output frequency: 1.7GHz
  • Translates any single ended input signal to LVDS levels with resistor bias on nCLK input
  • Output skew: 55ps (maximum)
  • Propagation delay: 850ps (maximum)
  • Additive phase jitter, RMS: 0.067ps (typical)
  • Full 3.3V or 2.5V power supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

产品选择

器件号 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
854S006AGILF
Active TSSOP 24 I 是的 Tube
Availability
854S006AGILFT
Active TSSOP 24 I 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
854S006 Datasheet 数据手册 PDF 987 KB
NEN-10-01 Datasheet Errata 数据手册勘误表 PDF 123 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-846 Termination - LVDS 应用文档 PDF 133 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 544 KB
PCN# : TB1503-01R1 Carrier Tape Standardization for Selective Packages 产品变更通告 PDF 333 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages 产品变更通告 PDF 50 KB
PCN# : TB1503-01 Carrier Tape Standardization for Selective Packages 产品变更通告 PDF 291 KB
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 363 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products 产品变更通告 PDF 361 KB
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 209 KB
下载
854S006I IBIS Model 模型 - IBIS ZIP 63 KB
854S006I IBIS Model 模型 - IBIS ZIP 8 KB
其他
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Fanout Buffers Product Overview 产品简述 PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief 产品简述 PDF 378 KB