The 9FGV1004 is a member of Renesas' PhiClock™ programmable clock generator family. The 9FGV1004 provides 1 copy each of 2 integer-related frequencies, 2 copies of a fractional or spread-spectrum frequency and 2 copies of the crystal reference input. Two select pins allow for hardware selection of the desired configuration, or two I²C bits all easy software selection of the desired configuration. The user may configure any one of the four OTP configurations as the default when operating in I²C mode. Four unique I²C addresses are available, allowing easy I²C access to multiple components.

特性

  • PCIe Gen1–4 compliant
  • 267fs RMS typical phase jitter at 156.25MHz (12kHz–20MHz)
  • 4 programmable output pairs plus 2 LVCMOS REF outputs
  • 2 integer and 1 fractional or spread-spectrum output  per configuration
  • 1MHz–325MHz integer outputs (LVDS or LP-HCSL)
  • 1MHz–200MHz integer outputs (LVCMOS
  • 1.8V to 3.3V core VDD
  • Individual 1.8V to 3.3V VDDO for each programmable output pair
  • Supports HCSL, LVDS and LVCMOS I/O standards
  • Supports AC-coupled LVPECL and CML logic – see AN-891
  • 4 × 4 mm 24-VFQFPN and 24-LGA packages with 50MHz integrated crystal option
  • Supported by Timing Commander™ software

tune产品选择

This device is factory-configurable. Try the Custom Part Configuration Utility.
器件号 Part Status Output Type Output Freq Range (MHz) Supply Voltage (V) Xtal Freq (MHz) Pkg. Type Carrier Type Buy Sample
Active LP-HCSL, LVCMOS, LVDS 1 - 325 1.8, 2.5, 3.3 8 - 50 VFQFPN Tray
Availability
Active LP-HCSL, LVCMOS, LVDS 1 - 325 1.8, 2.5, 3.3 8 - 50 VFQFPN Reel
Availability
Active LP-HCSL, LVDS 50, 100, 125, 156.25 1.8, 3.3 50 VFQFPN Tray
Availability
Active LP-HCSL, LVDS 50, 100, 125, 156.25 1.8, 3.3 50 VFQFPN Reel
Availability
Active LP-HCSL, LVDS 50, 100, 125, 156.25 1.8, 3.3 50 LGA Tray
Availability
Active LP-HCSL, LVDS 50, 100, 125, 156.25 1.8, 3.3 50 LGA Reel
Availability

description文档

文档标题 language 类型 文档格式 文件大小 日期
数据手册与勘误表
star 9FGV1004C-9FGV1008C Datasheet 数据手册 PDF 386 KB
9FGV1004C001 Datasheet Addendum 数据手册 PDF 150 KB
9FGV1004CQ501 Datasheet Addendum 数据手册 PDF 150 KB
使用指南与说明
9FGV100x Timing Commander User Guide 手册 - 软件 PDF 1.55 MB
9FGV100x Register Descriptions and Programming Guide 手册 - 软件 PDF 401 KB
应用指南 & 白皮书
How to Make 1.2V LVCMOS from 1.8V LVCMOS Output 应用文档 PDF 256 KB
Driving Differential, Single-Ended, and/or Frequency Generator Crystal Inputs 应用文档 PDF 134 KB
9FGV100x: PhiClock OTP Procedure 应用文档 PDF 222 KB
AN-1014 Microstrip vs Stripline: Crosstalk and RMS Phase Jitter 应用文档 PDF 486 KB
AN-1001 Combining PhiClock and 9ZXL1951D for PCIe Gen4/5 应用文档 PDF 244 KB
AN-975 Cascading PLLs 应用文档 PDF 255 KB
AN-918 Programmable Clocks vs Crystal Oscillators 应用文档 PDF 307 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs 应用文档 PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL 应用文档 PDF 235 KB
AN-843 PCI Express Reference Clock Requirements 应用文档 PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-802 Crystal-Measuring Oscillator Negative Resistance 应用文档 PDF 136 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : PCN200009 (R1) PhiClock Family Revision Update 产品变更通告 PDF 129 KB
PCN# : PCN200009 PhiClock Family Revision Update 产品变更通告 PDF 143 KB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
其他
I2C GUI Tool User Guide 其他 PDF 507 KB
PCI Express Timing Solutions Overview 概览 PDF 275 KB
9FGV1004 Reference Schematic 原理图 PDF 18 KB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB

file_download下载

文档标题 language 类型 文档格式 文件大小 日期
软件
9FGV100x Integer v4.2 Timing Commander Personality File Software & Tools - Other ZIP 3.89 MB
模型
9FGV1004 IBIS Model 模型 - IBIS ZIP 98 KB

memory开发板与套件

器件号 文档标题 类型 Company
EVK9FGV1004 Evaluation Kit for 9FGV1004 Programmable PhiClock™ Generator 评估 Renesas