The ISL73148SEHEV1Z board evaluates the operation of the Renesas ISL73148SEH radiation hardened 14-Bit 900/480ksps SAR ADC. This evaluation board is intended to be used with the RHADC-FMCEV1Z data capture board.

The ISL73148SEH device on the evaluation board supports operation of the ISL73148SEH with AVCC set to 5V. DVCC can be set to 2.5V or 3.3V, but the default setting is 2.5V. The reference voltage to the ADC can be set to 2.5V. The I/O voltage of the CPLD can be set to 2.5V or 3.3V operation as well, but should be matched to the DVCC setting. The supply voltage for the CPLD is set to 1.8V. The supply voltages to the analog input amplifier circuit is set to +7.5/-4.5V. These voltages are all derived from the ±10V supply inputs to the board.


  • Signal-to-Noise Ratio (SNR)
  • Signal-to-Noise-and-Distortion Ratio (SINAD)
  • Effective Number of Bits (ENOB)
  • Total Harmonic Distortion (THD)
  • Spurious Free Dynamic Range (SFDR)
  • Input voltage range (Analog input)
  • REF input voltage range (VREF input)



  • Precision signal processing in satellite payloads
  • Satellite telemetry systems
  • Satellite propulsion and orbit control
  • Attitude control of satellites
  • High-end industrial
  • Down-hole drilling


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