Optimized for small PLC and HMI, It’s can be reduce peripheral components due to large size of built-in RAM.
In addition powered by R-IN engine, it’s can be adaptable for gateway, sensor hub etc.
RZ/N1S housed Cortex®-A7 and a large size of built-in RAM in a small package. Since peripheral parts can be reduced, it can be used for small PLC, HMI, etc. In addition, since it has a proven R-IN engine as an accelerator for industrial Ethernet communication, it can be used for protocol gateway, sensor hub, etc.
Key Features :
|Power Supply Voltage||3.3 V for I/O, 1.15 V for CPU|
|CPU Core||Arm® Cortex®-A7 + Arm® Cortex®-M3 (R-IN engine)|
|Maximum Operating Frequency||500 MHz (Cortex®-A7) / 125 MHz (Cortex®-M3)|
|SRAM with ECC||6 MB|
|External Memory||NAND Flash Controller||Supported|
|Quad-I/O SPI||2 channels||1 channel|
|Display Function||LCD Controller
|Network Function||R-IN engine and Hardware RTOS||Supported|
|Ethernet Port||5 ports
|Selectable from GMAC、EtherCAT®、Sercos® Ⅲ|
|Independent GMAC||Up to 2 ports
||Up to 1 port|
|EtherCAT Slave Controller||Up to 3 ports
||Up to 2 ports
|SercosIII Slave Controller||Up to 2 ports
|Timer Function||General Timers||(16 bit x 6 channels + 32 bit × 2 channels) × 2|
|PWM Timers||16-bit x 16 channels|
|Watchdog||For Arm® Cortex®-A7 core and For + Arm®
(12-bit resolution A/D Converter)
|8 channels x 1 unit|
|Communication Interface||UART||8 channels
(Parallel Bus Interface)
|Master and Slave|
|USB 2.0||Host and Function|
|SPI||Master 4 channels + Slave 2 channels
|I/O Port||Max. 160||Max. 95|
(15 x 15 mm, 0.8 mm pitch)
(12 x 12 mm, 0.8 mm pitch)
|Operating temperature range||Tj = -40℃ ～ +110℃|
|Security function(Option) : Secure boot, JTAG lock, chip ID||Not Available||Available||Not Available||Available|
Pin Count / Memory Size:
You can find an explanation of orderable part numbers here.
Resources for Software and Hardware
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|e-learning||Information for studying and learning about microcontrollers and microprocessors.|
|FAQ||Frequently asked questions and useful hints for development.|
|Forum||A forum and community site to share technical information, questions and opinions with others who use Renesas products.|
Hardware Design Support
IBIS standard simulation data is required for high-speed board design and can be used to run simulations to examine and troubleshoot issues such as waveform reflection, ringing, and so on, before producing the actual board.
BSDL is a data input format supported by most IEEE 1149.1 (JTAG)-compliant tools. The automatic test pattern generation (ATPG) and automatic test equipment functions of these tools facilitate testing.
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